Ron Lieberman 9fd9db9736 [AMDGPU] Disable SReg Global LD/ST, perf regression ...

Differential Revision: https://reviews.llvm.org/D55093


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@348014 91177308-0d34-0410-b5e6-96231b3b80d8

2018-11-30 18:29:17 +00:00

..

AArch64

[MachineScheduler] Order FI-based memops based on stack direction

2018-11-29 20:03:19 +00:00

AMDGPU

[AMDGPU] Disable SReg Global LD/ST, perf regression

2018-11-30 18:29:17 +00:00

ARC

…

ARM

[ARM] Don't expand sdiv when optimising for minsize

2018-11-30 08:14:28 +00:00

AVR

[AVR] Reorder the CHECK lines in directmem.ll to match current trunk

2018-11-09 23:17:59 +00:00

BPF

[bpf] Test case for symbol information in object file

2018-09-22 17:31:01 +00:00

Generic

Moved dag-combine-select-undef.ll into amdgpu. NFC.

2018-11-17 00:17:15 +00:00

Hexagon

[Hexagon] make test immune to improvements in undef simplification

2018-11-19 15:34:09 +00:00

Inputs

…

Lanai

Remove SETCCE use from Lanai's backend

2018-06-03 12:56:24 +00:00

Mips

[TargetLowering] expandFP_TO_UINT - improve fp16 support

2018-11-19 19:16:13 +00:00

MIR

[CodeGen] Fix bugs in BranchFolderPass when debug labels are generated.

2018-11-30 08:07:29 +00:00

MSP430

[MSP430] Optimize srl/sra in case of A >> (8 + N)

2018-11-19 10:43:02 +00:00

Nios2

[Nios2] Arithmetic instructions for R1 and R2 ISA.

2018-01-09 11:15:08 +00:00

NVPTX

[LegalizeVectorTypes] Don't use SplitVecOp_TruncateHelper if we're heading towards scalarizing the type.

2018-11-23 02:32:13 +00:00

PowerPC

[PowerPC] Fix a conversion is not considered when the ISD::BR_CC node making the instruction selection

2018-11-29 03:04:39 +00:00

RISCV

[SelectionDAG] Support result type promotion for FLT_ROUNDS_

2018-11-30 13:18:33 +00:00

SPARC

Relax fast register allocator related test cases; NFC

2018-10-29 20:10:42 +00:00

SystemZ

[SystemZ] make test immune to improvements in undef simplification

2018-11-18 16:50:44 +00:00

Thumb

[SelectionDAG] swap select_cc operands to enable folding

2018-11-09 11:09:40 +00:00

Thumb2

[ARM] Enable spilling of the hGPR register class in Thumb2

2018-11-08 13:02:10 +00:00

WebAssembly

[WebAssembly] WebAssemblyLowerEmscriptenEHSjLj: use getter/setter for accessing tempRet0

2018-11-20 19:25:07 +00:00

WinCFGuard

[COFF] Emit @feat.00 on 64-bit and set the CFG bit when emitting guardcf tables

2018-09-19 09:58:30 +00:00

WinEH

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

X86

[x86] add tests for fake vector FP ops; NFC

2018-11-30 16:50:08 +00:00

XCore

Relax fast register allocator related test cases; NFC

2018-10-29 20:10:42 +00:00