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a09362eb97
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31985 91177308-0d34-0410-b5e6-96231b3b80d8
257 lines
9.2 KiB
C++
257 lines
9.2 KiB
C++
//===-- RegAllocSimple.cpp - A simple generic register allocator ----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements a simple register allocator. *Very* simple: It immediate
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// spills every value right after it is computed, and it reloads all used
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// operands from the spill area to temporary registers before each instruction.
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// It does not keep values in registers across instructions.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "regalloc"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/SSARegMap.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/RegAllocRegistry.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/STLExtras.h"
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#include <iostream>
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using namespace llvm;
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namespace {
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static Statistic<> NumStores("ra-simple", "Number of stores added");
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static Statistic<> NumLoads ("ra-simple", "Number of loads added");
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static RegisterRegAlloc
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simpleRegAlloc("simple", " simple register allocator",
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createSimpleRegisterAllocator);
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class VISIBILITY_HIDDEN RegAllocSimple : public MachineFunctionPass {
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MachineFunction *MF;
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const TargetMachine *TM;
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const MRegisterInfo *RegInfo;
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bool *PhysRegsEverUsed;
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// StackSlotForVirtReg - Maps SSA Regs => frame index on the stack where
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// these values are spilled
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std::map<unsigned, int> StackSlotForVirtReg;
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// RegsUsed - Keep track of what registers are currently in use. This is a
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// bitset.
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std::vector<bool> RegsUsed;
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// RegClassIdx - Maps RegClass => which index we can take a register
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// from. Since this is a simple register allocator, when we need a register
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// of a certain class, we just take the next available one.
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std::map<const TargetRegisterClass*, unsigned> RegClassIdx;
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public:
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virtual const char *getPassName() const {
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return "Simple Register Allocator";
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}
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/// runOnMachineFunction - Register allocate the whole function
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bool runOnMachineFunction(MachineFunction &Fn);
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequiredID(PHIEliminationID); // Eliminate PHI nodes
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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private:
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/// AllocateBasicBlock - Register allocate the specified basic block.
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void AllocateBasicBlock(MachineBasicBlock &MBB);
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/// getStackSpaceFor - This returns the offset of the specified virtual
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/// register on the stack, allocating space if necessary.
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int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
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/// Given a virtual register, return a compatible physical register that is
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/// currently unused.
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///
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/// Side effect: marks that register as being used until manually cleared
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///
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unsigned getFreeReg(unsigned virtualReg);
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/// Moves value from memory into that register
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unsigned reloadVirtReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I, unsigned VirtReg);
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/// Saves reg value on the stack (maps virtual register to stack value)
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void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
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unsigned VirtReg, unsigned PhysReg);
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};
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}
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/// getStackSpaceFor - This allocates space for the specified virtual
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/// register to be held on the stack.
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int RegAllocSimple::getStackSpaceFor(unsigned VirtReg,
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const TargetRegisterClass *RC) {
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// Find the location VirtReg would belong...
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std::map<unsigned, int>::iterator I =
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StackSlotForVirtReg.lower_bound(VirtReg);
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if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
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return I->second; // Already has space allocated?
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// Allocate a new stack object for this spill location...
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int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
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RC->getAlignment());
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// Assign the slot...
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StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
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return FrameIdx;
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}
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unsigned RegAllocSimple::getFreeReg(unsigned virtualReg) {
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const TargetRegisterClass* RC = MF->getSSARegMap()->getRegClass(virtualReg);
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TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
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TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
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while (1) {
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unsigned regIdx = RegClassIdx[RC]++;
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assert(RI+regIdx != RE && "Not enough registers!");
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unsigned PhysReg = *(RI+regIdx);
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if (!RegsUsed[PhysReg]) {
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PhysRegsEverUsed[PhysReg] = true;
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return PhysReg;
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}
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}
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}
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unsigned RegAllocSimple::reloadVirtReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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unsigned VirtReg) {
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const TargetRegisterClass* RC = MF->getSSARegMap()->getRegClass(VirtReg);
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int FrameIdx = getStackSpaceFor(VirtReg, RC);
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unsigned PhysReg = getFreeReg(VirtReg);
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// Add move instruction(s)
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++NumLoads;
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RegInfo->loadRegFromStackSlot(MBB, I, PhysReg, FrameIdx, RC);
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return PhysReg;
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}
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void RegAllocSimple::spillVirtReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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unsigned VirtReg, unsigned PhysReg) {
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const TargetRegisterClass* RC = MF->getSSARegMap()->getRegClass(VirtReg);
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int FrameIdx = getStackSpaceFor(VirtReg, RC);
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// Add move instruction(s)
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++NumStores;
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RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIdx, RC);
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}
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void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
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// loop over each instruction
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for (MachineBasicBlock::iterator MI = MBB.begin(); MI != MBB.end(); ++MI) {
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// Made to combat the incorrect allocation of r2 = add r1, r1
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std::map<unsigned, unsigned> Virt2PhysRegMap;
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RegsUsed.resize(RegInfo->getNumRegs());
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// This is a preliminary pass that will invalidate any registers that are
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// used by the instruction (including implicit uses).
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unsigned Opcode = MI->getOpcode();
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const TargetInstrDescriptor &Desc = TM->getInstrInfo()->get(Opcode);
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const unsigned *Regs;
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if (Desc.ImplicitUses) {
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for (Regs = Desc.ImplicitUses; *Regs; ++Regs)
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RegsUsed[*Regs] = true;
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}
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if (Desc.ImplicitDefs) {
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for (Regs = Desc.ImplicitDefs; *Regs; ++Regs) {
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RegsUsed[*Regs] = true;
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PhysRegsEverUsed[*Regs] = true;
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}
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}
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// Loop over uses, move from memory into registers.
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for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
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MachineOperand &op = MI->getOperand(i);
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if (op.isRegister() && op.getReg() &&
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MRegisterInfo::isVirtualRegister(op.getReg())) {
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unsigned virtualReg = (unsigned) op.getReg();
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DOUT << "op: " << op << "\n";
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DOUT << "\t inst[" << i << "]: ";
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DEBUG(MI->print(std::cerr, TM));
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// make sure the same virtual register maps to the same physical
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// register in any given instruction
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unsigned physReg = Virt2PhysRegMap[virtualReg];
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if (physReg == 0) {
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if (op.isDef()) {
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int TiedOp = TM->getInstrInfo()
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->findTiedToSrcOperand(MI->getOpcode(), i);
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if (TiedOp == -1) {
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physReg = getFreeReg(virtualReg);
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} else {
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// must be same register number as the source operand that is
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// tied to. This maps a = b + c into b = b + c, and saves b into
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// a's spot.
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assert(MI->getOperand(TiedOp).isRegister() &&
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MI->getOperand(TiedOp).getReg() &&
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MI->getOperand(TiedOp).isUse() &&
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"Two address instruction invalid!");
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physReg = MI->getOperand(TiedOp).getReg();
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}
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spillVirtReg(MBB, next(MI), virtualReg, physReg);
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} else {
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physReg = reloadVirtReg(MBB, MI, virtualReg);
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Virt2PhysRegMap[virtualReg] = physReg;
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}
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}
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MI->getOperand(i).setReg(physReg);
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DOUT << "virt: " << virtualReg << ", phys: " << op.getReg() << "\n";
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}
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}
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RegClassIdx.clear();
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RegsUsed.clear();
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}
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}
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/// runOnMachineFunction - Register allocate the whole function
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///
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bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
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DOUT << "Machine Function\n";
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MF = &Fn;
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TM = &MF->getTarget();
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RegInfo = TM->getRegisterInfo();
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PhysRegsEverUsed = new bool[RegInfo->getNumRegs()];
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std::fill(PhysRegsEverUsed, PhysRegsEverUsed+RegInfo->getNumRegs(), false);
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Fn.setUsedPhysRegs(PhysRegsEverUsed);
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// Loop over all of the basic blocks, eliminating virtual register references
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for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
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MBB != MBBe; ++MBB)
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AllocateBasicBlock(*MBB);
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StackSlotForVirtReg.clear();
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return true;
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}
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FunctionPass *llvm::createSimpleRegisterAllocator() {
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return new RegAllocSimple();
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}
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