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a44b674a42
llvm/lib/Target/IA64
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Dan Gohman a44b674a42 Replace some std::vectors that showed up in heap profiling with 
SmallVectors. Change the signature of TargetLowering::LowerArguments
to avoid returning a vector by value, and update the two targets
which still use this directly, Sparc and IA64, accordingly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@52917 91177308-0d34-0410-b5e6-96231b3b80d8
2008-06-30 20:31:15 +00:00
..
IA64.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
IA64.td Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
IA64AsmPrinter.cpp Add CommonLinkage; currently tentative definitions 2008-05-14 20:12:51 +00:00
IA64Bundling.cpp Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
IA64InstrBuilder.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
IA64InstrFormats.td Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
IA64InstrInfo.cpp remove MachineOpCode typedef. 2008-01-07 02:48:55 +00:00
IA64InstrInfo.h Change target-specific classes to use more precise static types. 2008-05-14 01:58:56 +00:00
IA64InstrInfo.td Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF. 2008-03-15 00:03:38 +00:00
IA64ISelDAGToDAG.cpp Wrap MVT::ValueType in a struct to get type safety 2008-06-06 12:08:01 +00:00
IA64ISelLowering.cpp Replace some std::vectors that showed up in heap profiling with 2008-06-30 20:31:15 +00:00
IA64ISelLowering.h Replace some std::vectors that showed up in heap profiling with 2008-06-30 20:31:15 +00:00
IA64MachineFunctionInfo.h Remove trailing whitespace 2005-04-21 23:13:11 +00:00
IA64RegisterInfo.cpp Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo. 2008-03-31 20:40:39 +00:00
IA64RegisterInfo.h Move reMaterialize() from TargetRegisterInfo to TargetInstrInfo. 2008-03-31 20:40:39 +00:00
IA64RegisterInfo.td make sure ar.pfs is in a register class, this fixes test/CodeGen/IA64/ret-0.ll 2008-03-09 20:12:44 +00:00
IA64TargetAsmInfo.cpp Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
IA64TargetAsmInfo.h Remove attribution from file headers, per discussion on llvmdev. 2007-12-29 20:36:04 +00:00
IA64TargetMachine.cpp Clean up the use of static and anonymous namespaces. This turned up 2008-05-13 00:00:25 +00:00
IA64TargetMachine.h Change target-specific classes to use more precise static types. 2008-05-14 01:58:56 +00:00
Makefile remove attribution from lib Makefiles. 2007-12-29 20:09:26 +00:00
README Stuff noticed while grepping code 2008-02-11 23:47:56 +00:00

README 

TODO:
  - Un-bitrot ISel
  - Hook up If-Conversion a la ARM target
  - Hook up all branch analysis functions
  - Instruction scheduling
  - Bundling
  - Dynamic Optimization
  - Testing and bugfixing
  - stop passing FP args in both FP *and* integer regs when not required
  - allocate low (nonstacked) registers more aggressively
  - clean up and thoroughly test the isel patterns.
  - fix stacked register allocation order: (for readability) we don't want
    the out? registers being the first ones used
  - fix up floating point
    (nb http://gcc.gnu.org/wiki?pagename=ia64%20floating%20point )
  - bundling!
    (we will avoid the mess that is:
     http://gcc.gnu.org/ml/gcc/2003-12/msg00832.html )
  - instruction scheduling (hmmmm! ;)
  - counted loop support
  - make integer + FP mul/div more clever (we have fixed pseudocode atm)
  - track and use comparison complements

INFO:
  - we are strictly LP64 here, no support for ILP32 on HP-UX. Linux users
    don't need to worry about this.
  - i have instruction scheduling/bundling pseudocode, that really works
    (has been tested, albeit at the perl-script level).
    so, before you go write your own, send me an email!

KNOWN DEFECTS AT THE CURRENT TIME:
  - C++ vtables contain naked function pointers, not function descriptors,
  which is bad. see http://llvm.cs.uiuc.edu/bugs/show_bug.cgi?id=406
  - varargs are broken
  - alloca doesn't work (indeed, stack frame layout is bogus)
  - no support for big-endian environments
  - (not really the backend, but...) the CFE has some issues on IA64.
    these will probably be fixed soon.
  
ACKNOWLEDGEMENTS:
  - Chris Lattner (x100)
  - Other LLVM developers ("hey, that looks familiar")

CONTACT:
  - You can email me at duraid@octopus.com.au. If you find a small bug,
    just email me. If you find a big bug, please file a bug report
    in bugzilla! http://llvm.cs.uiuc.edu is your one stop shop for all
    things LLVM.