Craig Topper c28a81a948 [X86] Prevent folding a load into an AND if that AND is really a ZEXT_INREG that should use movzx. ...

This can save a 32-bit immediate move.

We would shrink the load and fold it if it was non-volatile, but that's trickier to check for.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@359129 91177308-0d34-0410-b5e6-96231b3b80d8

2019-04-24 19:28:38 +00:00

..

AArch64

[AArch64][GlobalISel] Select G_INTRINSIC_ROUND

2019-04-23 23:03:03 +00:00

AMDGPU

[AMDGPU] Add gfx1010 target definitions

2019-04-24 17:03:15 +00:00

ARC

[ARC] Add ARCOptAddrMode pass to generate postincrement loads/stores.

2019-03-20 20:06:21 +00:00

ARM

[ARM][FIX] Add missing f16.lane.vldN/vstN lowering

2019-04-23 09:36:39 +00:00

AVR

[DAGCombiner] If a TokenFactor would be merged into its user, consider the user later.

2019-03-13 17:07:09 +00:00

BPF

[BPF] add proper multi-dimensional array support

2019-03-28 21:59:49 +00:00

Generic

Fix nondeterminism introduced in r353954

2019-03-26 12:18:08 +00:00

Hexagon

[DAGCombiner] Combine OR as ADD when no common bits are set

2019-04-23 10:01:08 +00:00

Inputs

…

Lanai

[Targets] Add errors for tiny and kernel codemodel on targets that don't support them

2018-12-07 12:10:23 +00:00

Mips

[GlobalISel] Enable CSE in the IRTranslator & legalizer for -O0 with constants only.

2019-04-15 05:04:20 +00:00

MIR

[X86] Merge the different Jcc instructions for each condition code into single instructions that store the condition code as an operand.

2019-04-05 19:28:09 +00:00

MSP430

[DAGCombiner] If a TokenFactor would be merged into its user, consider the user later.

2019-03-13 17:07:09 +00:00

NVPTX

[NVPTX] Fix the codegen for llvm.round.

2019-04-01 16:10:26 +00:00

PowerPC

[PowerPC] Fix wrong ElemSIze when calling isConsecutiveLS()

2019-04-18 07:24:15 +00:00

RISCV

[RISCV] Custom lower SHL_PARTS, SRA_PARTS, SRL_PARTS

2019-04-16 14:38:32 +00:00

SPARC

[SPARC] Use the correct register set for the "r" asm constraint.

2019-04-23 15:15:33 +00:00

SystemZ

Revert rL357745: [SelectionDAG] Compute known bits of CopyFromReg

2019-04-10 18:00:41 +00:00

Thumb

[ARM] Add an extra constant hoisting test. NFC

2019-04-10 18:05:57 +00:00

Thumb2

[ARM] Update check for CBZ in Ifcvt

2019-04-23 12:11:26 +00:00

WebAssembly

[WebAssembly] Emit br_table for most switch instructions

2019-04-23 21:30:30 +00:00

WinCFGuard

[COFF] Emit @feat.00 on 64-bit and set the CFG bit when emitting guardcf tables

2018-09-19 09:58:30 +00:00

WinEH

Fix invalid target triples in tests. (NFC)

2019-03-04 23:37:41 +00:00

X86

[X86] Prevent folding a load into an AND if that AND is really a ZEXT_INREG that should use movzx.

2019-04-24 19:28:38 +00:00

XCore

[DAGCombiner] If a TokenFactor would be merged into its user, consider the user later.

2019-03-13 17:07:09 +00:00