Guozhi Wei d3fe6038ab [PPC] Change the register constraint of the first source operand of instruction mtvsrdd to g8rc_nox0 ... According to Power ISA V3.0 document, the first source operand of mtvsrdd is constant 0 if r0 is specified. So the corresponding register constraint should be g8rc_nox0. This bug caused wrong output generated by 401.bzip2 when -mcpu=power9 and fdo are specified. Differential Revision: https://reviews.llvm.org/D32880 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@302834 91177308-0d34-0410-b5e6-96231b3b80d8		2017-05-11 22:17:35 +00:00
..
CMakeLists.txt
LLVMBuild.txt
PPCDisassembler.cpp	[PPC] Change the register constraint of the first source operand of instruction mtvsrdd to g8rc_nox0	2017-05-11 22:17:35 +00:00