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a16fdea51a
This patch fixes register alignment for long double type in soft float mode. Before this patch alignment was 8 and this patch changes it to 4. Differential Revision: http://reviews.llvm.org/D18034 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268909 91177308-0d34-0410-b5e6-96231b3b80d8
36 lines
1.1 KiB
C++
36 lines
1.1 KiB
C++
//===---- PPCCCState.cpp - CCState with PowerPC specific extensions ---------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "PPCCCState.h"
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#include "PPCSubtarget.h"
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#include "llvm/IR/Module.h"
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using namespace llvm;
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// Identify lowered values that originated from ppcf128 arguments and record
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// this.
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void PPCCCState::PreAnalyzeCallOperands(
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const SmallVectorImpl<ISD::OutputArg> &Outs) {
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for (const auto &I : Outs) {
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if (I.ArgVT == llvm::MVT::ppcf128)
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OriginalArgWasPPCF128.push_back(true);
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else
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OriginalArgWasPPCF128.push_back(false);
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}
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}
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void PPCCCState::PreAnalyzeFormalArguments(
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const SmallVectorImpl<ISD::InputArg> &Ins) {
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for (const auto &I : Ins) {
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if (I.ArgVT == llvm::MVT::ppcf128) {
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OriginalArgWasPPCF128.push_back(true);
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} else {
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OriginalArgWasPPCF128.push_back(false);
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}
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}
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} |