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8ba98f908f
Summary: This commit adds comments on how the AMDPAL OS type overloads the existing AMDGPU_ calling conventions used by Mesa, and adds a couple of new ones. Reviewers: arsenm, nhaehnle, dstuttard Subscribers: mehdi_amini, kzhuravl, wdng, yaxunl, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D37752 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@314502 91177308-0d34-0410-b5e6-96231b3b80d8
160 lines
5.9 KiB
C++
160 lines
5.9 KiB
C++
//===- AMDGPUAliasAnalysis ------------------------------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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/// This is the AMGPU address space based alias analysis pass.
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//===----------------------------------------------------------------------===//
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#include "AMDGPUAliasAnalysis.h"
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#include "AMDGPU.h"
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#include "llvm/ADT/Triple.h"
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#include "llvm/Analysis/AliasAnalysis.h"
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#include "llvm/Analysis/MemoryLocation.h"
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#include "llvm/Analysis/ValueTracking.h"
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#include "llvm/IR/Argument.h"
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#include "llvm/IR/Attributes.h"
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#include "llvm/IR/CallingConv.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/GlobalVariable.h"
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#include "llvm/IR/Type.h"
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#include "llvm/IR/Value.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/Casting.h"
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#include "llvm/Support/ErrorHandling.h"
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#include <cassert>
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using namespace llvm;
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#define DEBUG_TYPE "amdgpu-aa"
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// Register this pass...
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char AMDGPUAAWrapperPass::ID = 0;
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INITIALIZE_PASS(AMDGPUAAWrapperPass, "amdgpu-aa",
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"AMDGPU Address space based Alias Analysis", false, true)
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ImmutablePass *llvm::createAMDGPUAAWrapperPass() {
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return new AMDGPUAAWrapperPass();
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}
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void AMDGPUAAWrapperPass::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesAll();
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}
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// Must match the table in getAliasResult.
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AMDGPUAAResult::ASAliasRulesTy::ASAliasRulesTy(AMDGPUAS AS_, Triple::ArchType Arch_)
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: Arch(Arch_), AS(AS_) {
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// These arrarys are indexed by address space value
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// enum elements 0 ... to 5
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static const AliasResult ASAliasRulesPrivIsZero[6][6] = {
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/* Private Global Constant Group Flat Region*/
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/* Private */ {MayAlias, NoAlias , NoAlias , NoAlias , MayAlias, NoAlias},
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/* Global */ {NoAlias , MayAlias, NoAlias , NoAlias , MayAlias, NoAlias},
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/* Constant */ {NoAlias , NoAlias , MayAlias, NoAlias , MayAlias, NoAlias},
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/* Group */ {NoAlias , NoAlias , NoAlias , MayAlias, MayAlias, NoAlias},
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/* Flat */ {MayAlias, MayAlias, MayAlias, MayAlias, MayAlias, MayAlias},
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/* Region */ {NoAlias , NoAlias , NoAlias , NoAlias , MayAlias, MayAlias}
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};
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static const AliasResult ASAliasRulesGenIsZero[6][6] = {
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/* Flat Global Constant Group Region Private */
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/* Flat */ {MayAlias, MayAlias, MayAlias, MayAlias, MayAlias, MayAlias},
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/* Global */ {MayAlias, MayAlias, NoAlias , NoAlias , NoAlias , NoAlias},
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/* Constant */ {MayAlias, NoAlias , MayAlias, NoAlias , NoAlias, NoAlias},
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/* Group */ {MayAlias, NoAlias , NoAlias , MayAlias, NoAlias , NoAlias},
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/* Region */ {MayAlias, NoAlias , NoAlias , NoAlias, MayAlias, NoAlias},
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/* Private */ {MayAlias, NoAlias , NoAlias , NoAlias , NoAlias , MayAlias}
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};
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assert(AS.MAX_COMMON_ADDRESS <= 5);
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if (AS.FLAT_ADDRESS == 0) {
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assert(AS.GLOBAL_ADDRESS == 1 &&
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AS.REGION_ADDRESS == 4 &&
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AS.LOCAL_ADDRESS == 3 &&
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AS.CONSTANT_ADDRESS == 2 &&
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AS.PRIVATE_ADDRESS == 5);
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ASAliasRules = &ASAliasRulesGenIsZero;
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} else {
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assert(AS.PRIVATE_ADDRESS == 0 &&
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AS.GLOBAL_ADDRESS == 1 &&
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AS.CONSTANT_ADDRESS == 2 &&
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AS.LOCAL_ADDRESS == 3 &&
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AS.FLAT_ADDRESS == 4 &&
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AS.REGION_ADDRESS == 5);
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ASAliasRules = &ASAliasRulesPrivIsZero;
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}
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}
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AliasResult AMDGPUAAResult::ASAliasRulesTy::getAliasResult(unsigned AS1,
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unsigned AS2) const {
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if (AS1 > AS.MAX_COMMON_ADDRESS || AS2 > AS.MAX_COMMON_ADDRESS) {
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if (Arch == Triple::amdgcn)
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report_fatal_error("Pointer address space out of range");
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return AS1 == AS2 ? MayAlias : NoAlias;
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}
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return (*ASAliasRules)[AS1][AS2];
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}
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AliasResult AMDGPUAAResult::alias(const MemoryLocation &LocA,
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const MemoryLocation &LocB) {
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unsigned asA = LocA.Ptr->getType()->getPointerAddressSpace();
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unsigned asB = LocB.Ptr->getType()->getPointerAddressSpace();
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AliasResult Result = ASAliasRules.getAliasResult(asA, asB);
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if (Result == NoAlias) return Result;
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// Forward the query to the next alias analysis.
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return AAResultBase::alias(LocA, LocB);
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}
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bool AMDGPUAAResult::pointsToConstantMemory(const MemoryLocation &Loc,
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bool OrLocal) {
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const Value *Base = GetUnderlyingObject(Loc.Ptr, DL);
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if (Base->getType()->getPointerAddressSpace() == AS.CONSTANT_ADDRESS) {
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return true;
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}
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if (const GlobalVariable *GV = dyn_cast<GlobalVariable>(Base)) {
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if (GV->isConstant())
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return true;
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} else if (const Argument *Arg = dyn_cast<Argument>(Base)) {
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const Function *F = Arg->getParent();
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// Only assume constant memory for arguments on kernels.
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switch (F->getCallingConv()) {
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default:
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return AAResultBase::pointsToConstantMemory(Loc, OrLocal);
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case CallingConv::AMDGPU_LS:
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case CallingConv::AMDGPU_HS:
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case CallingConv::AMDGPU_ES:
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case CallingConv::AMDGPU_GS:
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case CallingConv::AMDGPU_VS:
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case CallingConv::AMDGPU_PS:
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case CallingConv::AMDGPU_CS:
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case CallingConv::AMDGPU_KERNEL:
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case CallingConv::SPIR_KERNEL:
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break;
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}
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unsigned ArgNo = Arg->getArgNo();
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/* On an argument, ReadOnly attribute indicates that the function does
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not write through this pointer argument, even though it may write
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to the memory that the pointer points to.
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On an argument, ReadNone attribute indicates that the function does
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not dereference that pointer argument, even though it may read or write
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the memory that the pointer points to if accessed through other pointers.
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*/
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if (F->hasParamAttribute(ArgNo, Attribute::NoAlias) &&
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(F->hasParamAttribute(ArgNo, Attribute::ReadNone) ||
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F->hasParamAttribute(ArgNo, Attribute::ReadOnly))) {
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return true;
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}
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}
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return AAResultBase::pointsToConstantMemory(Loc, OrLocal);
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}
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