Sylvestre Ledru a7f0941b83 Fix typos: ...

* libaries => libraries
* avaiable => available



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@215366 91177308-0d34-0410-b5e6-96231b3b80d8

2014-08-11 18:04:46 +00:00

..

AsmParser

Run sort_includes.py on the AArch64 backend.

2014-07-25 11:42:14 +00:00

Disassembler

Run sort_includes.py on the AArch64 backend.

2014-07-25 11:42:14 +00:00

InstPrinter

Run sort_includes.py on the AArch64 backend.

2014-07-25 11:42:14 +00:00

MCTargetDesc

If available, pass down the Fixup object to EvaluateAsRelocatable.

2014-08-10 11:35:12 +00:00

TargetInfo

AArch64: stop trying to take control of all UnknownArch triples.

2014-08-08 08:27:44 +00:00

Utils

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AArch64.h

[AArch64] Add an FP load balancing pass for Cortex-A57

2014-08-08 12:33:21 +00:00

AArch64.td

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AArch64A57FPLoadBalancing.cpp

AArch64: avoid deleting the current iterator in a loop.

2014-08-08 17:31:52 +00:00

AArch64AddressTypePromotion.cpp

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AArch64AdvSIMDScalarPass.cpp

Remove the TargetMachine forwards for TargetSubtargetInfo based

2014-08-04 21:25:23 +00:00

AArch64AsmPrinter.cpp

Remove the TargetMachine forwards for TargetSubtargetInfo based

2014-08-04 21:25:23 +00:00

AArch64BranchRelaxation.cpp

Remove the TargetMachine forwards for TargetSubtargetInfo based

2014-08-04 21:25:23 +00:00

AArch64CallingConvention.td

Remove the target machine from CCState. Previously it was only used

2014-08-06 18:45:26 +00:00

AArch64CleanupLocalDynamicTLSPass.cpp

Remove the TargetMachine forwards for TargetSubtargetInfo based

2014-08-04 21:25:23 +00:00

AArch64CollectLOH.cpp

Remove the TargetMachine forwards for TargetSubtargetInfo based

2014-08-04 21:25:23 +00:00

AArch64ConditionalCompares.cpp

Have MachineFunction cache a pointer to the subtarget to make lookups

2014-08-05 02:39:49 +00:00

AArch64DeadRegisterDefinitionsPass.cpp

Have MachineFunction cache a pointer to the subtarget to make lookups

2014-08-05 02:39:49 +00:00

AArch64ExpandPseudoInsts.cpp

Have MachineFunction cache a pointer to the subtarget to make lookups

2014-08-05 02:39:49 +00:00

AArch64FastISel.cpp

[FastISel][AArch64] Attach MachineMemOperands to load and store instructions.

2014-08-08 17:24:10 +00:00

AArch64FrameLowering.cpp

Fix typos:

2014-08-11 18:04:46 +00:00

AArch64FrameLowering.h

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AArch64InstrAtomics.td

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AArch64InstrFormats.td

MachineCombiner Pass for selecting faster instruction sequence on AArch64

2014-08-07 21:40:58 +00:00

AArch64InstrInfo.cpp

Resolving some type truncation warnings in MSVC (enum to bool in this case). No functional changes intended.

2014-08-09 19:53:34 +00:00

AArch64InstrInfo.h

MachineCombiner Pass for selecting faster instruction sequence on AArch64

2014-08-07 21:40:58 +00:00

AArch64InstrInfo.td

[AArch64] Disable some optimization cases for type conversion from sint to fp, because those optimization cases are micro-architecture dependent and only make sense for Cyclone. A new predicate Cyclone is introduced in .td file.

2014-07-24 01:29:59 +00:00

AArch64ISelDAGToDAG.cpp

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AArch64ISelLowering.cpp

Remove the target machine from CCState. Previously it was only used

2014-08-06 18:45:26 +00:00

AArch64ISelLowering.h

Add alignment value to allowsUnalignedMemoryAccess

2014-07-27 17:46:40 +00:00

AArch64LoadStoreOptimizer.cpp

Remove the TargetMachine forwards for TargetSubtargetInfo based

2014-08-04 21:25:23 +00:00

AArch64MachineCombinerPattern.h

MachineCombiner Pass for selecting faster instruction sequence on AArch64

2014-08-07 21:40:58 +00:00

AArch64MachineFunctionInfo.h

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AArch64MCInstLower.cpp

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AArch64MCInstLower.h

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AArch64PerfectShuffle.h

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AArch64PromoteConstant.cpp

Run sort_includes.py on the AArch64 backend.

2014-07-25 11:42:14 +00:00

AArch64RegisterInfo.cpp

Have MachineFunction cache a pointer to the subtarget to make lookups

2014-08-05 02:39:49 +00:00

AArch64RegisterInfo.h

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AArch64RegisterInfo.td

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AArch64SchedA53.td

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AArch64SchedA57.td

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AArch64SchedA57WriteRes.td

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AArch64SchedCyclone.td

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AArch64Schedule.td

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AArch64SelectionDAGInfo.cpp

Remove the TargetMachine forwards for TargetSubtargetInfo based

2014-08-04 21:25:23 +00:00

AArch64SelectionDAGInfo.h

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AArch64StorePairSuppress.cpp

Have MachineFunction cache a pointer to the subtarget to make lookups

2014-08-05 02:39:49 +00:00

AArch64Subtarget.cpp

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AArch64Subtarget.h

[AArch64] Add a few isTarget* API to AArch64 Subtarget.

2014-08-06 16:56:58 +00:00

AArch64TargetMachine.cpp

[AArch64] Add an FP load balancing pass for Cortex-A57

2014-08-08 12:33:21 +00:00

AArch64TargetMachine.h

Remove the TargetMachine forwards for TargetSubtargetInfo based

2014-08-04 21:25:23 +00:00

AArch64TargetObjectFile.cpp

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AArch64TargetObjectFile.h

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AArch64TargetTransformInfo.cpp

Teach the SLP Vectorizer that keeping some values live over a callsite can have a cost.

2014-08-05 12:30:34 +00:00

CMakeLists.txt

[AArch64] Add an FP load balancing pass for Cortex-A57

2014-08-08 12:33:21 +00:00

LLVMBuild.txt

Prune redundant libdeps.

2014-07-24 11:45:27 +00:00

Makefile

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