mirror of
https://github.com/RPCS3/llvm.git
synced 2025-02-21 11:11:42 +00:00

Summary: This required adding the instruction predicate HasMips32r5. Patch by Scott Egerton. Reviewers: dsanders, vkalintiris Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11136 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242666 91177308-0d34-0410-b5e6-96231b3b80d8
9 lines
300 B
ArmAsm
9 lines
300 B
ArmAsm
# Instructions that are invalid
|
|
#
|
|
# RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips64 \
|
|
# RUN: 2>%t1
|
|
# RUN: FileCheck %s < %t1
|
|
|
|
.set noat
|
|
eretnc # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|