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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110460 91177308-0d34-0410-b5e6-96231b3b80d8
315 lines
10 KiB
C++
315 lines
10 KiB
C++
//===-- llvm/CodeGen/RenderMachineFunction.h - MF->HTML -*- C++ -*---------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_RENDERMACHINEFUNCTION_H
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#define LLVM_CODEGEN_RENDERMACHINEFUNCTION_H
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#include "llvm/CodeGen/LiveInterval.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/SlotIndexes.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include <algorithm>
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#include <map>
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#include <set>
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#include <string>
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namespace llvm {
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class LiveInterval;
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class LiveIntervals;
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class MachineInstr;
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class MachineRegisterInfo;
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class TargetRegisterClass;
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class TargetRegisterInfo;
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class VirtRegMap;
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class raw_ostream;
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/// \brief Provide extra information about the physical and virtual registers
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/// in the function being compiled.
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class TargetRegisterExtraInfo {
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public:
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TargetRegisterExtraInfo();
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/// \brief Set up TargetRegisterExtraInfo with pointers to necessary
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/// sources of information.
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void setup(MachineFunction *mf, MachineRegisterInfo *mri,
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const TargetRegisterInfo *tri, LiveIntervals *lis);
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/// \brief Recompute tables for changed function.
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void reset();
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/// \brief Free all tables in TargetRegisterExtraInfo.
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void clear();
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/// \brief Maximum number of registers from trc which alias reg.
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unsigned getWorst(unsigned reg, const TargetRegisterClass *trc) const;
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/// \brief Returns the number of allocable registers in trc.
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unsigned getCapacity(const TargetRegisterClass *trc) const;
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/// \brief Return the number of registers of class trc that may be
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/// needed at slot i.
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unsigned getPressureAtSlot(const TargetRegisterClass *trc,
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SlotIndex i) const;
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/// \brief Return true if the number of registers of type trc that may be
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/// needed at slot i is greater than the capacity of trc.
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bool classOverCapacityAtSlot(const TargetRegisterClass *trc,
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SlotIndex i) const;
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private:
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MachineFunction *mf;
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MachineRegisterInfo *mri;
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const TargetRegisterInfo *tri;
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LiveIntervals *lis;
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typedef std::map<const TargetRegisterClass*, unsigned> WorstMapLine;
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typedef std::map<const TargetRegisterClass*, WorstMapLine> VRWorstMap;
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VRWorstMap vrWorst;
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typedef std::map<unsigned, WorstMapLine> PRWorstMap;
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PRWorstMap prWorst;
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typedef std::map<const TargetRegisterClass*, unsigned> CapacityMap;
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CapacityMap capacityMap;
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typedef std::map<const TargetRegisterClass*, unsigned> PressureMapLine;
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typedef std::map<SlotIndex, PressureMapLine> PressureMap;
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PressureMap pressureMap;
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bool mapsPopulated;
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/// \brief Initialise the 'worst' table.
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void initWorst();
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/// \brief Initialise the 'capacity' table.
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void initCapacity();
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/// \brief Initialise/Reset the 'pressure' and live states tables.
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void resetPressureAndLiveStates();
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};
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/// \brief Helper class to process rendering options. Tries to be as lazy as
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/// possible.
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class MFRenderingOptions {
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public:
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struct RegClassComp {
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bool operator()(const TargetRegisterClass *trc1,
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const TargetRegisterClass *trc2) const {
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std::string trc1Name(trc1->getName()), trc2Name(trc2->getName());
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return std::lexicographical_compare(trc1Name.begin(), trc1Name.end(),
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trc2Name.begin(), trc2Name.end());
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}
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};
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typedef std::set<const TargetRegisterClass*, RegClassComp> RegClassSet;
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struct IntervalComp {
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bool operator()(const LiveInterval *li1, const LiveInterval *li2) const {
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return li1->reg < li2->reg;
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}
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};
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typedef std::set<const LiveInterval*, IntervalComp> IntervalSet;
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/// Initialise the rendering options.
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void setup(MachineFunction *mf, const TargetRegisterInfo *tri,
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LiveIntervals *lis);
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/// Clear translations of options to the current function.
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void clear();
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/// Reset any options computed for this specific rendering.
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void resetRenderSpecificOptions();
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/// Should we render the current function.
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bool shouldRenderCurrentMachineFunction() const;
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/// Return the set of register classes to render pressure for.
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const RegClassSet& regClasses() const;
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/// Return the set of live intervals to render liveness for.
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const IntervalSet& intervals() const;
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/// Render indexes which are not associated with instructions / MBB starts.
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bool renderEmptyIndexes() const;
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/// Return whether or not to render using SVG for fancy vertical text.
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bool fancyVerticals() const;
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private:
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static bool renderingOptionsProcessed;
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static std::set<std::string> mfNamesToRender;
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static bool renderAllMFs;
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static std::set<std::string> classNamesToRender;
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static bool renderAllClasses;
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static std::set<std::pair<unsigned, unsigned> > intervalNumsToRender;
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typedef enum { ExplicitOnly = 0,
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VirtPlusExplicit = 1,
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PhysPlusExplicit = 2,
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All = 3 }
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IntervalTypesToRender;
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static unsigned intervalTypesToRender;
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template <typename OutputItr>
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static void splitComaSeperatedList(const std::string &s, OutputItr outItr);
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static void processOptions();
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static void processFuncNames();
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static void processRegClassNames();
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static void processIntervalNumbers();
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static void processIntervalRange(const std::string &intervalRangeStr);
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MachineFunction *mf;
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const TargetRegisterInfo *tri;
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LiveIntervals *lis;
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mutable bool regClassesTranslatedToCurrentFunction;
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mutable RegClassSet regClassSet;
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mutable bool intervalsTranslatedToCurrentFunction;
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mutable IntervalSet intervalSet;
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void translateRegClassNamesToCurrentFunction() const;
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void translateIntervalNumbersToCurrentFunction() const;
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};
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/// \brief Render MachineFunction objects and related information to a HTML
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/// page.
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class RenderMachineFunction : public MachineFunctionPass {
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public:
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static char ID;
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RenderMachineFunction() : MachineFunctionPass(ID) {}
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virtual void getAnalysisUsage(AnalysisUsage &au) const;
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virtual bool runOnMachineFunction(MachineFunction &fn);
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virtual void releaseMemory();
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/// \brief Render this machine function to HTML.
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///
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/// @param renderContextStr This parameter will be included in the top of
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/// the html file to explain where (in the
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/// codegen pipeline) this function was rendered
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/// from. Set it to something like
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/// "Pre-register-allocation".
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/// @param vrm If non-null the VRM will be queried to determine
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/// whether a virtual register was allocated to a
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/// physical register or spilled.
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/// @param renderFilePrefix This string will be appended to the function
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/// name (before the output file suffix) to enable
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/// multiple renderings from the same function.
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void renderMachineFunction(const char *renderContextStr,
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const VirtRegMap *vrm = 0,
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const char *renderSuffix = 0);
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private:
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class Spacer;
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friend raw_ostream& operator<<(raw_ostream &os, const Spacer &s);
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std::string fqn;
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MachineFunction *mf;
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MachineRegisterInfo *mri;
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const TargetRegisterInfo *tri;
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LiveIntervals *lis;
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SlotIndexes *sis;
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const VirtRegMap *vrm;
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TargetRegisterExtraInfo trei;
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MFRenderingOptions ro;
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// Utilities.
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typedef enum { Dead, Defined, Used, AliveReg, AliveStack } LiveState;
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LiveState getLiveStateAt(const LiveInterval *li, SlotIndex i) const;
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typedef enum { Zero, Low, High } PressureState;
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PressureState getPressureStateAt(const TargetRegisterClass *trc,
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SlotIndex i) const;
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// ---------- Rendering methods ----------
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/// For inserting spaces when pretty printing.
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class Spacer {
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public:
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explicit Spacer(unsigned numSpaces) : ns(numSpaces) {}
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Spacer operator+(const Spacer &o) const { return Spacer(ns + o.ns); }
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void print(raw_ostream &os) const;
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private:
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unsigned ns;
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};
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Spacer s(unsigned ns) const;
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template <typename Iterator>
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std::string escapeChars(Iterator sBegin, Iterator sEnd) const;
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/// \brief Render a machine instruction.
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void renderMachineInstr(raw_ostream &os,
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const MachineInstr *mi) const;
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/// \brief Render vertical text.
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template <typename T>
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void renderVertical(const Spacer &indent,
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raw_ostream &os,
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const T &t) const;
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/// \brief Insert CSS layout info.
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void insertCSS(const Spacer &indent,
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raw_ostream &os) const;
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/// \brief Render a brief summary of the function (including rendering
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/// context).
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void renderFunctionSummary(const Spacer &indent,
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raw_ostream &os,
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const char * const renderContextStr) const;
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/// \brief Render a legend for the pressure table.
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void renderPressureTableLegend(const Spacer &indent,
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raw_ostream &os) const;
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/// \brief Render a consecutive set of HTML cells of the same class using
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/// the colspan attribute for run-length encoding.
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template <typename CellType>
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void renderCellsWithRLE(
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const Spacer &indent, raw_ostream &os,
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const std::pair<CellType, unsigned> &rleAccumulator,
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const std::map<CellType, std::string> &cellTypeStrs) const;
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/// \brief Render code listing, potentially with register pressure
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/// and live intervals shown alongside.
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void renderCodeTablePlusPI(const Spacer &indent,
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raw_ostream &os) const;
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/// \brief Render the HTML page representing the MachineFunction.
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void renderFunctionPage(raw_ostream &os,
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const char * const renderContextStr) const;
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std::string escapeChars(const std::string &s) const;
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};
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}
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#endif /* LLVM_CODEGEN_RENDERMACHINEFUNCTION_H */
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