Tom Stellard 70a9ca9420 R600: Fix for Unigine when MachineSched is enabled ... Fixes for-loop.cl piglit test Patch By: Vincent Lejeune Reviewed-by: Tom Stellard <thomas.stellard@amd.com> NOTE: This is a candidate for the Mesa stable branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175742 91177308-0d34-0410-b5e6-96231b3b80d8		2013-02-21 15:06:59 +00:00
..
128bit-kernel-args.ll	R600: Add support for 128-bit parameters	2013-02-13 22:05:20 +00:00
add.v4i32.ll
and.v4i32.ll
dagcombiner-bug-illegal-vec4-int-to-fp.ll
disconnected-predset-break-bug.ll	R600: Fix for Unigine when MachineSched is enabled	2013-02-21 15:06:59 +00:00
fabs.ll
fadd.ll
fadd.v4f32.ll
fcmp-cnd.ll
fcmp-cnde-int-args.ll
fcmp.ll	R600: Add support for SET*_DX10 instructions	2013-02-07 14:02:35 +00:00
fdiv.v4f32.ll
floor.ll
fmad.ll	R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad pattern	2013-02-18 14:11:28 +00:00
fmax.ll
fmin.ll
fmul.ll
fmul.v4f32.ll
fsub.ll
fsub.v4f32.ll
i8_to_double_to_float.ll
icmp-select-sete-reverse-args.ll
kcache-fold.ll	R600: Do not fold single instruction with more that 3 kcache read	2013-02-14 16:57:19 +00:00
lit.local.cfg
literals.ll
llvm.AMDGPU.mul.ll
llvm.AMDGPU.tex.ll	R600: Add lit tests for texture sampling instruction selection.	2013-02-14 07:43:51 +00:00
llvm.AMDGPU.trunc.ll
llvm.cos.ll
llvm.pow.ll
llvm.SI.fs.interp.constant.ll	R600/SI: Make sure M0 is loaded for V_INTERP_MOV_F32	2013-02-21 08:57:10 +00:00
llvm.SI.sample.ll	R600: Add lit tests for texture sampling instruction selection.	2013-02-14 07:43:51 +00:00
llvm.sin.ll
load.constant_addrspace.f32.ll
load.i8.ll
predicates.ll	R600: Add tests for instruction predicates	2013-02-05 17:09:13 +00:00
reciprocal.ll
sdiv.ll
selectcc_cnde_int.ll
selectcc_cnde.ll
selectcc-icmp-select-float.ll	R600: Fix assembly name for SETGT_INT	2013-02-07 14:02:27 +00:00
set-dx10.ll	R600: Add support for SET*_DX10 instructions	2013-02-07 14:02:35 +00:00
setcc.v4i32.ll
short-args.ll
store.v4f32.ll
store.v4i32.ll
udiv.v4i32.ll
unsupported-cc.ll	R600: Add support for SET*_DX10 instructions	2013-02-07 14:02:35 +00:00
urem.v4i32.ll
vec4-expand.ll