Rafael Espindola b0bf8935ee Some test code to check if correct code is being generated. ... Patch by Sanjoy Das. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138820 91177308-0d34-0410-b5e6-96231b3b80d8		2011-08-30 19:51:29 +00:00
..
Alpha
ARM	Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical	2011-08-30 01:34:54 +00:00
Blackfin
CBackend	Revert r137134. It breaks some code as Eli pointed out.	2011-08-09 18:56:35 +00:00
CellSPU
CPP
Generic	Revert r138606 until LowerInvoke has been converted to the new EH scheme.	2011-08-26 21:11:23 +00:00
MBlaze
Mips	Use subword loads instead of a 4-byte load when the size of a structure (or a	2011-08-18 23:39:37 +00:00
MSP430
PowerPC	Set CR1EQ only when lowering vararg floating arguments (not any vararg	2011-08-30 17:04:16 +00:00
PTX	PTX: Add initial support for device function calls	2011-08-09 17:36:31 +00:00
SPARC
SystemZ
Thumb
Thumb2	Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical	2011-08-30 01:34:54 +00:00
X86	Some test code to check if correct code is being generated.	2011-08-30 19:51:29 +00:00
XCore	Add Uses=[SP] to call instructions. This fixes a miscompilation with a	2011-08-24 13:32:43 +00:00