Igor Breger 48f2d1dea0 [AVX512] Add aliases for vcvttss2si{l|q}, vcvttsd2si{l|q}, vcvttss2usi{l|q}, vcvttsd2usi{l|q} instructions. ...

Differential Revision: http://reviews.llvm.org/D23111

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@277586 91177308-0d34-0410-b5e6-96231b3b80d8

2016-08-03 10:58:05 +00:00

..

AArch64

AArch64: TableGenerate system instruction operands.

2016-07-05 21:23:04 +00:00

AMDGPU

[AMDGPU] refactor DS instruction definitions. NFC.

2016-08-01 14:21:30 +00:00

ARM

Fix handling of end-of-line preprocessor comments Attempt 2

2016-08-02 19:17:54 +00:00

AsmParser

Revert r276895 "[MC][X86] Fix Intel Operand assembly parsing for .set ids"

2016-08-01 23:00:01 +00:00

COFF

[codeview] Shrink inlined call site line info tables

2016-07-14 23:47:15 +00:00

Disassembler

[AMDGPU] refactor DS instruction definitions. NFC.

2016-08-01 14:21:30 +00:00

ELF

Add initial support for R_386_GOT32X.

2016-07-06 21:19:11 +00:00

Hexagon

Remove redundant -mattr options from llvm-objdump commands.

2016-06-16 15:47:19 +00:00

Lanai

[lanai] Add more tests for assembly of conditional ALU ops

2016-07-11 17:58:16 +00:00

MachO

CodeGen: Use PLT relocations for relative references to unnamed_addr functions.

2016-04-22 20:40:10 +00:00

Markup

MC: Simple example parser for MC assembly markup.

2012-10-31 23:24:13 +00:00

Mips

[mips][ias] Check '$rs = $rd' constraints when both registers are in AsmText.

2016-07-27 13:49:44 +00:00

PowerPC

Add aliases for mfvrsave/mtvrsave.

2016-06-09 23:27:48 +00:00

Sparc

Don't pass a Reloc::Model to MC.

2016-05-18 11:58:50 +00:00

SystemZ

[SystemZ] Recognize Load On Condition Immediate (LOCHI/LOGHI) opportunities

2016-07-11 18:45:03 +00:00

X86

[AVX512] Add aliases for vcvttss2si{l|q}, vcvttsd2si{l|q}, vcvttss2usi{l|q}, vcvttsd2usi{l|q} instructions.

2016-08-03 10:58:05 +00:00