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Cong Hou b5b07c3686 [X86][SSE] Detect AVG pattern during instruction combine for SSE2/AVX2/AVX512BW.
This patch detects the AVG pattern in vectorized code, which is simply
c = (a + b + 1) / 2, where a, b, and c have the same type which are vectors of
either unsigned i8 or unsigned i16. In the IR, i8/i16 will be promoted to
i32 before any arithmetic operations. The following IR shows such an example:

%1 = zext <N x i8> %a to <N x i32>
%2 = zext <N x i8> %b to <N x i32>
%3 = add nuw nsw <N x i32> %1, <i32 1 x N>
%4 = add nuw nsw <N x i32> %3, %2
%5 = lshr <N x i32> %N, <i32 1 x N>
%6 = trunc <N x i32> %5 to <N x i8>

and with this patch it will be converted to a X86ISD::AVG instruction.

The pattern recognition is done when combining instructions just before type
legalization during instruction selection. We do it here because after type
legalization, it is much more difficult to do pattern recognition based
on many instructions that are doing type conversions. Therefore, for
target-specific instructions (like X86ISD::AVG), we need to take care of type
legalization by ourselves. However, as X86ISD::AVG behaves similarly to
ISD::ADD, I am wondering if there is a way to legalize operands and result
types of X86ISD::AVG together with ISD::ADD. It seems that the current design
doesn't support this idea.

Tests are added for SSE2, AVX2, and AVX512BW and both i8 and i16 types of
variant vector sizes.


Differential revision: http://reviews.llvm.org/D14761




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@253952 91177308-0d34-0410-b5e6-96231b3b80d8
2015-11-24 05:44:19 +00:00
autoconf Add AVR backend skeleton 2015-11-12 09:26:44 +00:00
bindings Fix llvm-config to adapt to the install environment. 2015-11-09 23:15:38 +00:00
cmake [CMake] export_executable_symbols also needs to add -rdynamic to the linker flags on Darwin 2015-11-24 00:58:58 +00:00
docs [PGO] Add --text option for llvm-profdata show|merge commands 2015-11-23 20:47:38 +00:00
examples examples: Remove implicit ilist iterator conversions, NFC 2015-11-07 00:55:46 +00:00
include [DIE] Make DIE.h NDEBUG conditional-free. 2015-11-24 02:21:43 +00:00
lib [X86][SSE] Detect AVG pattern during instruction combine for SSE2/AVX2/AVX512BW. 2015-11-24 05:44:19 +00:00
projects [CMake] Disable adding the test suite as a projects subdirectory 2015-10-28 18:36:56 +00:00
resources
test [X86][SSE] Detect AVG pattern during instruction combine for SSE2/AVX2/AVX512BW. 2015-11-24 05:44:19 +00:00
tools Don't create implicit comdats. 2015-11-23 22:01:51 +00:00
unittests [Support] Add optional argument to SaturatingAdd() and SaturatingMultiply() to indicate that overflow occurred 2015-11-23 21:54:22 +00:00
utils Make utils/update_llc_test_checks.py note that the assertions are 2015-11-23 21:33:58 +00:00
.arcconfig
.clang-format
.clang-tidy
.gitignore
CMakeLists.txt [CMake] Add support for building the llvm test-suite as part of an LLVM build using clang and lld 2015-11-11 16:14:03 +00:00
CODE_OWNERS.TXT Add myself as the the code owner for the AVR backend 2015-10-28 00:24:54 +00:00
configure Add AVR backend skeleton 2015-11-12 09:26:44 +00:00
CREDITS.TXT
LICENSE.TXT
llvm.spec.in
LLVMBuild.txt
Makefile
Makefile.common
Makefile.config.in
Makefile.rules Create Makefile variables for 'share' and 'libexec' 2015-11-09 16:10:00 +00:00
README.txt Test commit after password reset 2015-11-11 19:24:08 +00:00

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