Ulrich Weigand b5bf1de320 [SystemZ] Add support for IBM z14 processor (2/3) ... This adds support for the new 32-bit vector float instructions of z14. This includes: - Enabling the instructions for the assembler/disassembler. - CodeGen for the instructions, including new LLVM intrinsics. - Scheduler description support for the instructions. - Update to the vector cost function calculations. In general, CodeGen support for the new v4f32 instructions closely matches support for the existing v2f64 instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308195 91177308-0d34-0410-b5e6-96231b3b80d8		2017-07-17 17:42:48 +00:00
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llvm	[SystemZ] Add support for IBM z14 processor (2/3)	2017-07-17 17:42:48 +00:00
llvm-c	[ORC] Errorize the ORC APIs.	2017-07-07 02:59:13 +00:00