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d6c98ae638
Add HexagonMCInst class which adds various Hexagon VLIW annotations. In addition, this class also includes some APIs related to the constant extenders. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175634 91177308-0d34-0410-b5e6-96231b3b80d8
58 lines
1.8 KiB
LLVM
58 lines
1.8 KiB
LLVM
; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
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; Check that we constant extended instructions only when necessary.
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define i32 @cext_test1(i32* %a) nounwind {
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; CHECK: r{{[0-9]+}}{{ *}}={{ *}}memw(r{{[0-9]+}}+##8000)
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; CHECK: r{{[0-9]+}}{{ *}}={{ *}}add(r{{[0-9]+}}{{ *}},{{ *}}##300000)
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; CHECK-NOT: r{{[0-9]+}}{{ *}}={{ *}}memw(r{{[0-9]+}}+##4092)
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; CHECK-NOT: r{{[0-9]+}}{{ *}}={{ *}}add(r{{[0-9]+}}{{ *}},{{ *}}##300)
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entry:
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%0 = load i32* %a, align 4
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%tobool = icmp ne i32 %0, 0
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br i1 %tobool, label %if.then, label %if.end
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if.then:
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%arrayidx1 = getelementptr inbounds i32* %a, i32 2000
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%1 = load i32* %arrayidx1, align 4
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%add = add nsw i32 %1, 300000
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br label %return
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if.end:
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%arrayidx2 = getelementptr inbounds i32* %a, i32 1023
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%2 = load i32* %arrayidx2, align 4
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%add3 = add nsw i32 %2, 300
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br label %return
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return:
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%retval.0 = phi i32 [ %add, %if.then ], [ %add3, %if.end ]
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ret i32 %retval.0
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}
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define i32 @cext_test2(i8* %a) nounwind {
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; CHECK-NOT: r{{[0-9]+}}{{ *}}={{ *}}memub(r{{[0-9]+}}+##1023)
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; CHECK: r{{[0-9]+}}{{ *}}={{ *}}add(r{{[0-9]+}}{{ *}},{{ *}}##300000)
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; CHECK: r{{[0-9]+}}{{ *}}={{ *}}memub(r{{[0-9]+}}+##1024)
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; CHECK-NOT: r{{[0-9]+}}{{ *}}={{ *}}add(r{{[0-9]+}}{{ *}},{{ *}}##6000)
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entry:
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%tobool = icmp ne i8* %a, null
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br i1 %tobool, label %if.then, label %if.end
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if.then:
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%arrayidx = getelementptr inbounds i8* %a, i32 1023
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%0 = load i8* %arrayidx, align 1
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%conv = zext i8 %0 to i32
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%add = add nsw i32 %conv, 300000
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br label %return
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if.end:
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%arrayidx1 = getelementptr inbounds i8* %a, i32 1024
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%1 = load i8* %arrayidx1, align 1
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%conv2 = zext i8 %1 to i32
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%add3 = add nsw i32 %conv2, 6000
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br label %return
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return:
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%retval.0 = phi i32 [ %add, %if.then ], [ %add3, %if.end ]
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ret i32 %retval.0
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}
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