Vikram S. Adve b7f06f46a1 Fixed instruction information for RDCCR and WRCCR. ...

Fixed selection to create a TmpInstruction for each integer CC register
(since it is an implicit side-effect, unlike FP CC registers which are
explicit operands).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@1120 91177308-0d34-0410-b5e6-96231b3b80d8

2001-11-04 19:34:49 +00:00

..

Analysis

Added function IsLeafMethod to identify leaf methods.

2001-10-22 13:55:46 +00:00

AsmParser

Improve some debugging code

2001-11-02 07:46:26 +00:00

Bytecode

Fix major bugs in type resolution

2001-11-03 03:27:53 +00:00

CodeGen

Minor method rename

2001-11-04 08:08:34 +00:00

ExecutionEngine

Be lenient on types so that programs that are not very typesafe will work

2001-11-03 10:15:32 +00:00

Linker

Don't forget to link type names together too. Fix for Olden/mst benchmark

2001-11-03 05:18:24 +00:00

Support

Provide option to enable eating of all arguments following a specific one

2001-10-27 05:54:17 +00:00

Target

Fixed instruction information for RDCCR and WRCCR.

2001-11-04 19:34:49 +00:00

Transforms

Minor method rename

2001-11-04 08:08:34 +00:00

VMCore

Don't forget to link type names together too. Fix for Olden/mst benchmark

2001-11-03 05:18:24 +00:00

Makefile

Compile the transforms directory

2001-10-13 07:04:00 +00:00