llvm/test/CodeGen/ARM/reg_asc_order.ll
Jakob Stoklund Olesen e3b23cde80 Allocate virtual registers in ascending order.
This is just the fallback tie-breaker ordering, the main allocation
order is still descending size.

Patch by Shamil Kurmangaleev!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153904 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-02 22:30:39 +00:00

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LLVM

; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s
; Check that memcpy gets lowered to ldm/stm, at least in this very smple case.
%struct.Foo = type { i32, i32, i32, i32 }
define void @_Z10CopyStructP3FooS0_(%struct.Foo* nocapture %a, %struct.Foo* nocapture %b) nounwind {
entry:
;CHECK: ldm
;CHECK: stm
%0 = bitcast %struct.Foo* %a to i8*
%1 = bitcast %struct.Foo* %b to i8*
tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %0, i8* %1, i32 16, i32 4, i1 false)
ret void
}
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind