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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
65 lines
3.1 KiB
LLVM
65 lines
3.1 KiB
LLVM
; RUN: llc < %s -mtriple=i386-apple-darwin10
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; PR4910
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%0 = type { i32, i32, i32, i32 }
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@boot_cpu_id = external global i32 ; <i32*> [#uses=1]
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@cpu_logical = common global i32 0, align 4 ; <i32*> [#uses=1]
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define void @topo_probe_0xb() nounwind ssp {
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entry:
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br label %for.cond
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for.cond: ; preds = %for.inc38, %entry
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%0 = phi i32 [ 0, %entry ], [ %inc40, %for.inc38 ] ; <i32> [#uses=3]
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%cmp = icmp slt i32 %0, 3 ; <i1> [#uses=1]
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br i1 %cmp, label %for.body, label %for.end41
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for.body: ; preds = %for.cond
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%1 = tail call %0 asm sideeffect "cpuid", "={ax},={bx},={cx},={dx},0,{cx},~{dirflag},~{fpsr},~{flags}"(i32 11, i32 %0) nounwind ; <%0> [#uses=3]
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%asmresult.i = extractvalue %0 %1, 0 ; <i32> [#uses=1]
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%asmresult10.i = extractvalue %0 %1, 2 ; <i32> [#uses=1]
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%and = and i32 %asmresult.i, 31 ; <i32> [#uses=2]
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%shr42 = lshr i32 %asmresult10.i, 8 ; <i32> [#uses=1]
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%and12 = and i32 %shr42, 255 ; <i32> [#uses=2]
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%cmp14 = icmp eq i32 %and12, 0 ; <i1> [#uses=1]
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br i1 %cmp14, label %for.end41, label %lor.lhs.false
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lor.lhs.false: ; preds = %for.body
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%asmresult9.i = extractvalue %0 %1, 1 ; <i32> [#uses=1]
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%and7 = and i32 %asmresult9.i, 65535 ; <i32> [#uses=1]
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%cmp16 = icmp eq i32 %and7, 0 ; <i1> [#uses=1]
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br i1 %cmp16, label %for.end41, label %for.cond17.preheader
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for.cond17.preheader: ; preds = %lor.lhs.false
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%tmp24 = load i32, i32* @boot_cpu_id ; <i32> [#uses=1]
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%shr26 = ashr i32 %tmp24, %and ; <i32> [#uses=1]
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br label %for.body20
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for.body20: ; preds = %for.body20, %for.cond17.preheader
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%2 = phi i32 [ 0, %for.cond17.preheader ], [ %inc32, %for.body20 ] ; <i32> [#uses=2]
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%cnt.143 = phi i32 [ 0, %for.cond17.preheader ], [ %inc.cnt.1, %for.body20 ] ; <i32> [#uses=1]
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%shr23 = ashr i32 %2, %and ; <i32> [#uses=1]
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%cmp27 = icmp eq i32 %shr23, %shr26 ; <i1> [#uses=1]
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%inc = zext i1 %cmp27 to i32 ; <i32> [#uses=1]
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%inc.cnt.1 = add i32 %inc, %cnt.143 ; <i32> [#uses=2]
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%inc32 = add nsw i32 %2, 1 ; <i32> [#uses=2]
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%exitcond = icmp eq i32 %inc32, 255 ; <i1> [#uses=1]
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br i1 %exitcond, label %for.end, label %for.body20
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for.end: ; preds = %for.body20
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%cmp34 = icmp eq i32 %and12, 1 ; <i1> [#uses=1]
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br i1 %cmp34, label %if.then35, label %for.inc38
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if.then35: ; preds = %for.end
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store i32 %inc.cnt.1, i32* @cpu_logical
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br label %for.inc38
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for.inc38: ; preds = %for.end, %if.then35
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%inc40 = add nsw i32 %0, 1 ; <i32> [#uses=1]
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br label %for.cond
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for.end41: ; preds = %lor.lhs.false, %for.body, %for.cond
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ret void
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}
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