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3bd732d1ee
For some history here see the commit messages of r199797 and r169060. The original intent was to fix cases like: %EAX<def> = COPY %ECX<kill>, %RAX<imp-def> %RCX<def> = COPY %RAX<kill> where simply removing the copies would have RCX undefined as in terms of machine operands only the ECX part of it is defined. The machine verifier would complain about this so 169060 changed such COPY instructions into KILL instructions so some super-register imp-defs would be preserved. In r199797 it was finally decided to always do this regardless of super-register defs. But this is wrong, consider: R1 = COPY R0 ... R0 = COPY R1 getting changed to: R1 = KILL R0 ... R0 = KILL R1 It now looks like R0 dies at the first KILL and won't be alive until the second KILL, while in reality R0 is alive and must not change in this part of the program. As this only happens after register allocation there is not much code still performing liveness queries so the issue was not noticed. In fact I didn't manage to create a testcase for this, without unrelated changes I am working on at the moment. The fix is simple: As of r223896 the MachineVerifier allows reads from partially defined registers, so the whole transforming COPY->KILL thing is not necessary anymore. This patch also changes a similar (but more benign case as the def and src are the same register) case in the VirtRegRewriter. Differential Revision: http://reviews.llvm.org/D10117 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238588 91177308-0d34-0410-b5e6-96231b3b80d8
28 lines
1.3 KiB
LLVM
28 lines
1.3 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic -post-RA-scheduler=1 -break-anti-dependencies=critical | FileCheck %s
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; PR20308 ( http://llvm.org/bugs/show_bug.cgi?id=20308 )
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; The critical-anti-dependency-breaker must not use register def information from a kill inst.
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; This test case expects such an instruction to appear as a comment with def info for RDI.
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; There is an anti-dependency (WAR) hazard using RAX using default reg allocation and scheduling.
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; The post-RA-scheduler and critical-anti-dependency breaker can eliminate that hazard using R10.
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; That is the first free register that isn't used as a param in the call to "@Image".
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@PartClass = external global i32
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@NullToken = external global i64
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; CHECK-LABEL: Part_Create:
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; CHECK: movq PartClass@GOTPCREL(%rip), %r10
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define i32 @Part_Create(i64* %Anchor, i32 %TypeNum, i32 %F, i32 %Z, i32* %Status, i64* %PartTkn) {
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%PartObj = alloca i64*, align 8
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%Vchunk = alloca i64, align 8
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%1 = load i64, i64* @NullToken, align 4
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store i64 %1, i64* %Vchunk, align 8
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%2 = load i32, i32* @PartClass, align 4
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call i32 @Image(i64* %Anchor, i32 %2, i32 0, i32 0, i32* %Status, i64* %PartTkn, i64** %PartObj)
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call i32 @Create(i64* %Anchor)
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ret i32 %2
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}
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declare i32 @Image(i64*, i32, i32, i32, i32*, i64*, i64**)
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declare i32 @Create(i64*)
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