llvm/test/CodeGen/X86/float-conv-elim.ll
Ahmed Bougacha 4c690f3954 [X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr.
This re-applies r268760, reverted in r268794.
Fixes http://llvm.org/PR27670

The original imp-defs assertion was way overzealous: forward all
implicit operands, except imp-defs of the new super-reg def (r268787
for GR64, but also possible for GR16->GR32), or imp-uses of the new
super-reg use.
While there, mark the source use as Undef, and add an imp-use of the
old source reg: that should cover any case of dead super-regs.

At the stage the pass runs, flags are unlikely to matter anyway;
still, let's be as correct as possible.

Also add MIR tests for the various interesting cases.

Original commit message:
Codesize is less (16) or equal (8), and we avoid partial
dependencies.

Differential Revision: http://reviews.llvm.org/D19999

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268831 91177308-0d34-0410-b5e6-96231b3b80d8
2016-05-07 01:11:17 +00:00

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947 B
LLVM

; RUN: llc -mtriple=i686-unknown-linux-gnu -march=x86-64 -mcpu=x86-64 < %s | FileCheck %s
; Make sure the float conversion is folded away as it should be.
; CHECK-LABEL: foo
; CHECK-NOT: cvt
; CHECK: movzbl
define i32 @foo(i8 %a) #0 {
%conv = uitofp i8 %a to float
%conv1 = fptosi float %conv to i32
ret i32 %conv1
}
; CHECK-LABEL: foo2
; CHECK-NOT: cvt
; CHECK: movsbl
define i32 @foo2(i8 %a) #0 {
%conv = sitofp i8 %a to float
%conv1 = fptosi float %conv to i32
ret i32 %conv1
}
; CHECK-LABEL: bar
; CHECK-NOT: cvt
; CHECK: movl
define zeroext i8 @bar(i8 zeroext %a) #0 {
%conv = uitofp i8 %a to float
%conv1 = fptoui float %conv to i8
ret i8 %conv1
}
attributes #0 = { nounwind ssp uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }