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815b02e9ce
two fixes with one about error verify-regalloc reported, and another about live range update of phi after rematerialization. r265547: Replace analyzeSiblingValues with new algorithm to fix its compile time issue. The patch is to solve PR17409 and its duplicates. analyzeSiblingValues is a N x N complexity algorithm where N is the number of siblings generated by reg splitting. Although it causes siginificant compile time issue when N is large, it is also important for performance since it removes redundent spills and enables rematerialization. To solve the compile time issue, the patch removes analyzeSiblingValues and replaces it with lower cost alternatives containing two parts. The first part creates a new spill hoisting method in postOptimization of register allocation. It does spill hoisting at once after all the spills are generated instead of inside every instance of selectOrSplit. The second part queries the define expr of the original register for rematerializaiton and keep it always available during register allocation even if it is already dead. It deletes those dead instructions only in postOptimization. With the two parts in the patch, it can remove analyzeSiblingValues without sacrificing performance. Patches on top of r265547: r265610 "Fix the compare-clang diff error introduced by r265547." r265639 "Fix the sanitizer bootstrap error in r265547." r265657 "InlineSpiller.cpp: Escap \@ in r265547. [-Wdocumentation]" Differential Revision: http://reviews.llvm.org/D15302 Differential Revision: http://reviews.llvm.org/D18934 Differential Revision: http://reviews.llvm.org/D18935 Differential Revision: http://reviews.llvm.org/D18936 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@266162 91177308-0d34-0410-b5e6-96231b3b80d8
97 lines
2.3 KiB
LLVM
97 lines
2.3 KiB
LLVM
; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx | FileCheck %s
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; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx | FileCheck %s
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define i32 @TestComp128GT(fp128 %d1, fp128 %d2) {
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entry:
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%cmp = fcmp ogt fp128 %d1, %d2
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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; CHECK-LABEL: TestComp128GT:
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; CHECK: callq __gttf2
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; CHECK: setg %al
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; CHECK: movzbl %al, %eax
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; CHECK: retq
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}
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define i32 @TestComp128GE(fp128 %d1, fp128 %d2) {
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entry:
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%cmp = fcmp oge fp128 %d1, %d2
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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; CHECK-LABEL: TestComp128GE:
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; CHECK: callq __getf2
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; CHECK: testl %eax, %eax
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; CHECK: setns %al
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; CHECK: movzbl %al, %eax
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; CHECK: retq
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}
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define i32 @TestComp128LT(fp128 %d1, fp128 %d2) {
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entry:
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%cmp = fcmp olt fp128 %d1, %d2
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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; CHECK-LABEL: TestComp128LT:
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; CHECK: callq __lttf2
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; CHECK-NEXT: shrl $31, %eax
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; CHECK: retq
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;
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; The 'shrl' is a special optimization in llvm to combine
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; the effect of 'fcmp olt' and 'zext'. The main purpose is
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; to test soften call to __lttf2.
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}
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define i32 @TestComp128LE(fp128 %d1, fp128 %d2) {
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entry:
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%cmp = fcmp ole fp128 %d1, %d2
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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; CHECK-LABEL: TestComp128LE:
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; CHECK: callq __letf2
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; CHECK-NEXT: testl %eax, %eax
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; CHECK: setle %al
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; CHECK: movzbl %al, %eax
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; CHECK: retq
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}
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define i32 @TestComp128EQ(fp128 %d1, fp128 %d2) {
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entry:
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%cmp = fcmp oeq fp128 %d1, %d2
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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; CHECK-LABEL: TestComp128EQ:
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; CHECK: callq __eqtf2
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; CHECK-NEXT: testl %eax, %eax
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; CHECK: sete %al
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; CHECK: movzbl %al, %eax
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; CHECK: retq
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}
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define i32 @TestComp128NE(fp128 %d1, fp128 %d2) {
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entry:
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%cmp = fcmp une fp128 %d1, %d2
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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; CHECK-LABEL: TestComp128NE:
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; CHECK: callq __netf2
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; CHECK-NEXT: testl %eax, %eax
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; CHECK: setne %al
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; CHECK: movzbl %al, %eax
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; CHECK: retq
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}
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define fp128 @TestMax(fp128 %x, fp128 %y) {
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entry:
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%cmp = fcmp ogt fp128 %x, %y
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%cond = select i1 %cmp, fp128 %x, fp128 %y
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ret fp128 %cond
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; CHECK-LABEL: TestMax:
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; CHECK: movaps %xmm0
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; CHECK: movaps %xmm1
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; CHECK: callq __gttf2
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; CHECK: movaps {{.*}}, %xmm0
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; CHECK: testl %eax, %eax
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; CHECK: movaps {{.*}}, %xmm0
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; CHECK: retq
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}
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