llvm/movntdq-no-avx.ll at b8aff5533e1e770f2135705945f0fc41f01f872b - llvm - Gitea: Git with a cup of tea

RPCS3/llvm

mirror of https://github.com/RPCS3/llvm.git synced 2024-12-13 14:47:00 +00:00

Ahmed Bougacha 1522e8d8f8 [X86] Require 32-byte alignment for 32-byte VMOVNTs.

We used to accept (and even test, and generate) 16-byte alignment
for 32-byte nontemporal stores, but they require 32-byte alignment,
per SDM. Found by inspection.

Instead of hardcoding 16 in the patfrag, check for natural alignment.
Also fix the autoupgrade and the various tests.

Also, use explicit -mattr instead of -mcpu: I stared at the output
several minutes wondering why I get 2x movntps for the unaligned
case (which is the ideal output, but needs some work: see FIXME),
until I remembered corei7-avx implies +slow-unaligned-mem-32.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246733 91177308-0d34-0410-b5e6-96231b3b80d8

2015-09-02 23:25:39 +00:00

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 ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
 ; Test that we produce a movntdq, not a vmovntdq
 ; CHECK-NOT: vmovntdq
 define void @test(<2 x i64>* nocapture %a, <2 x i64> %b) nounwind optsize {
 entry:
   store <2 x i64> %b, <2 x i64>* %a, align 32, !nontemporal !0
   ret void
 }
 !0 = !{i32 1}