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ca396e391e
The syntax for "cmpxchg" should now look something like: cmpxchg i32* %addr, i32 42, i32 3 acquire monotonic where the second ordering argument gives the required semantics in the case that no exchange takes place. It should be no stronger than the first ordering constraint and cannot be either "release" or "acq_rel" (since no store will have taken place). rdar://problem/15996804 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203559 91177308-0d34-0410-b5e6-96231b3b80d8
22 lines
784 B
LLVM
22 lines
784 B
LLVM
; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mattr=-cx16 | FileCheck %s
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define void @test(i128* %a) nounwind {
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entry:
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; CHECK: __sync_val_compare_and_swap_16
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%0 = cmpxchg i128* %a, i128 1, i128 1 seq_cst seq_cst
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; CHECK: __sync_lock_test_and_set_16
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%1 = atomicrmw xchg i128* %a, i128 1 seq_cst
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; CHECK: __sync_fetch_and_add_16
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%2 = atomicrmw add i128* %a, i128 1 seq_cst
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; CHECK: __sync_fetch_and_sub_16
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%3 = atomicrmw sub i128* %a, i128 1 seq_cst
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; CHECK: __sync_fetch_and_and_16
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%4 = atomicrmw and i128* %a, i128 1 seq_cst
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; CHECK: __sync_fetch_and_nand_16
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%5 = atomicrmw nand i128* %a, i128 1 seq_cst
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; CHECK: __sync_fetch_and_or_16
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%6 = atomicrmw or i128* %a, i128 1 seq_cst
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; CHECK: __sync_fetch_and_xor_16
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%7 = atomicrmw xor i128* %a, i128 1 seq_cst
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ret void
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}
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