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4177e6fff5
This was done through the aid of a terrible Perl creation. I will not paste any of the horrors here. Suffice to say, it require multiple staged rounds of replacements, state carried between, and a few nested-construct-parsing hacks that I'm not proud of. It happens, by luck, to be able to deal with all the TCL-quoting patterns in evidence in the LLVM test suite. If anyone is maintaining large out-of-tree test trees, feel free to poke me and I'll send you the steps I used to convert things, as well as answer any painful questions etc. IRC works best for this type of thing I find. Once converted, switch the LLVM lit config to use ShTests the same as Clang. In addition to being able to delete large amounts of Python code from 'lit', this will also simplify the entire test suite and some of lit's architecture. Finally, the test suite runs 33% faster on Linux now. ;] For my 16-hardware-thread (2x 4-core xeon e5520): 36s -> 24s git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159525 91177308-0d34-0410-b5e6-96231b3b80d8
101 lines
2.8 KiB
LLVM
101 lines
2.8 KiB
LLVM
; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | \
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; RUN: grep "ro[rl]" | count 12
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define i32 @rotl32(i32 %A, i8 %Amt) {
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%shift.upgrd.1 = zext i8 %Amt to i32 ; <i32> [#uses=1]
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%B = shl i32 %A, %shift.upgrd.1 ; <i32> [#uses=1]
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%Amt2 = sub i8 32, %Amt ; <i8> [#uses=1]
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%shift.upgrd.2 = zext i8 %Amt2 to i32 ; <i32> [#uses=1]
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%C = lshr i32 %A, %shift.upgrd.2 ; <i32> [#uses=1]
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%D = or i32 %B, %C ; <i32> [#uses=1]
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ret i32 %D
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}
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define i32 @rotr32(i32 %A, i8 %Amt) {
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%shift.upgrd.3 = zext i8 %Amt to i32 ; <i32> [#uses=1]
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%B = lshr i32 %A, %shift.upgrd.3 ; <i32> [#uses=1]
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%Amt2 = sub i8 32, %Amt ; <i8> [#uses=1]
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%shift.upgrd.4 = zext i8 %Amt2 to i32 ; <i32> [#uses=1]
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%C = shl i32 %A, %shift.upgrd.4 ; <i32> [#uses=1]
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%D = or i32 %B, %C ; <i32> [#uses=1]
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ret i32 %D
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}
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define i32 @rotli32(i32 %A) {
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%B = shl i32 %A, 5 ; <i32> [#uses=1]
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%C = lshr i32 %A, 27 ; <i32> [#uses=1]
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%D = or i32 %B, %C ; <i32> [#uses=1]
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ret i32 %D
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}
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define i32 @rotri32(i32 %A) {
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%B = lshr i32 %A, 5 ; <i32> [#uses=1]
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%C = shl i32 %A, 27 ; <i32> [#uses=1]
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%D = or i32 %B, %C ; <i32> [#uses=1]
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ret i32 %D
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}
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define i16 @rotl16(i16 %A, i8 %Amt) {
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%shift.upgrd.5 = zext i8 %Amt to i16 ; <i16> [#uses=1]
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%B = shl i16 %A, %shift.upgrd.5 ; <i16> [#uses=1]
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%Amt2 = sub i8 16, %Amt ; <i8> [#uses=1]
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%shift.upgrd.6 = zext i8 %Amt2 to i16 ; <i16> [#uses=1]
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%C = lshr i16 %A, %shift.upgrd.6 ; <i16> [#uses=1]
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%D = or i16 %B, %C ; <i16> [#uses=1]
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ret i16 %D
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}
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define i16 @rotr16(i16 %A, i8 %Amt) {
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%shift.upgrd.7 = zext i8 %Amt to i16 ; <i16> [#uses=1]
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%B = lshr i16 %A, %shift.upgrd.7 ; <i16> [#uses=1]
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%Amt2 = sub i8 16, %Amt ; <i8> [#uses=1]
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%shift.upgrd.8 = zext i8 %Amt2 to i16 ; <i16> [#uses=1]
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%C = shl i16 %A, %shift.upgrd.8 ; <i16> [#uses=1]
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%D = or i16 %B, %C ; <i16> [#uses=1]
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ret i16 %D
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}
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define i16 @rotli16(i16 %A) {
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%B = shl i16 %A, 5 ; <i16> [#uses=1]
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%C = lshr i16 %A, 11 ; <i16> [#uses=1]
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%D = or i16 %B, %C ; <i16> [#uses=1]
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ret i16 %D
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}
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define i16 @rotri16(i16 %A) {
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%B = lshr i16 %A, 5 ; <i16> [#uses=1]
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%C = shl i16 %A, 11 ; <i16> [#uses=1]
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%D = or i16 %B, %C ; <i16> [#uses=1]
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ret i16 %D
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}
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define i8 @rotl8(i8 %A, i8 %Amt) {
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%B = shl i8 %A, %Amt ; <i8> [#uses=1]
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%Amt2 = sub i8 8, %Amt ; <i8> [#uses=1]
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%C = lshr i8 %A, %Amt2 ; <i8> [#uses=1]
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%D = or i8 %B, %C ; <i8> [#uses=1]
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ret i8 %D
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}
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define i8 @rotr8(i8 %A, i8 %Amt) {
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%B = lshr i8 %A, %Amt ; <i8> [#uses=1]
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%Amt2 = sub i8 8, %Amt ; <i8> [#uses=1]
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%C = shl i8 %A, %Amt2 ; <i8> [#uses=1]
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%D = or i8 %B, %C ; <i8> [#uses=1]
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ret i8 %D
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}
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define i8 @rotli8(i8 %A) {
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%B = shl i8 %A, 5 ; <i8> [#uses=1]
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%C = lshr i8 %A, 3 ; <i8> [#uses=1]
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%D = or i8 %B, %C ; <i8> [#uses=1]
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ret i8 %D
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}
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define i8 @rotri8(i8 %A) {
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%B = lshr i8 %A, 5 ; <i8> [#uses=1]
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%C = shl i8 %A, 3 ; <i8> [#uses=1]
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%D = or i8 %B, %C ; <i8> [#uses=1]
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ret i8 %D
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}
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