llvm/test/CodeGen/X86/shl-i64.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

21 lines
799 B
LLVM

; RUN: llc -march=x86 -mattr=+sse2 < %s | FileCheck %s
; Make sure that we don't generate an illegal i64 extract after LegalizeType.
; CHECK: shll
define void @test_cl(<4 x i64>* %dst, <4 x i64>* %src, i32 %idx) {
entry:
%arrayidx = getelementptr inbounds <4 x i64>, <4 x i64> * %src, i32 %idx
%0 = load <4 x i64> , <4 x i64> * %arrayidx, align 32
%arrayidx1 = getelementptr inbounds <4 x i64>, <4 x i64> * %dst, i32 %idx
%1 = load <4 x i64> , <4 x i64> * %arrayidx1, align 32
%2 = extractelement <4 x i64> %1, i32 0
%and = and i64 %2, 63
%3 = insertelement <4 x i64> undef, i64 %and, i32 0
%splat = shufflevector <4 x i64> %3, <4 x i64> undef, <4 x i32> zeroinitializer
%shl = shl <4 x i64> %0, %splat
store <4 x i64> %shl, <4 x i64> * %arrayidx1, align 32
ret void
}