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32-bit AllRegs: SSE: xmm0-xmm7 AVX: ymm0-ymm7 AVX512: zmm0-zmm7 + k0-k7 64-bit AllRegs: SSE: xmm0-xmm15 AVX: ymm0-ymm15 AVX512: zmm0-zmm31 + k0-k7 Differential Revision: http://reviews.llvm.org/D20142 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@269337 91177308-0d34-0410-b5e6-96231b3b80d8
34 lines
1.2 KiB
LLVM
34 lines
1.2 KiB
LLVM
; RUN: llc -verify-machineinstrs -mtriple=x86_64-apple-macosx -show-mc-encoding -mattr=+avx512f < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK64
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; RUN: llc -verify-machineinstrs -mtriple=i386-apple-macosx -show-mc-encoding -mattr=+avx512f < %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK32
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; Make sure we spill the high numbered ZMM registers and K registers with the right encoding.
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; CHECK-LABEL: foo
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; CHECK: kmovq %k7, {{.+}}
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; CHECK64: encoding: [0xc4,0xe1,0xf8,0x91,0xbc,0x24,0x68,0x08,0x00,0x00]
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; CHECK32: encoding: [0xc4,0xe1,0xf8,0x91,0xbc,0x24,0x68,0x02,0x00,0x00]
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; k6 is used as an anchor for the previous regexp.
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; CHECK-NEXT: kmovq %k6
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; CHECK64: movups %zmm31, {{.+}}
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; CHECK64: encoding: [0x62,0x61,0x7c,0x48,0x11,0xbc,0x24,0xe0,0x07,0x00,0x00]
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; zmm30 is used as an anchor for the previous regexp.
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; CHECK64-NEXT: movups %zmm30
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; CHECK32-NOT: zmm31
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; CHECK32-NOT: zmm8
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; CHECK32: movups %zmm7, {{.+}}
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; CHECK32: encoding: [0x62,0xf1,0x7c,0x48,0x11,0xbc,0x24,0xe0,0x01,0x00,0x00]
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; zmm6 is used as an anchor for the previous regexp.
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; CHECK32-NEXT: movups %zmm6
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; CHECK: call
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; CHECK: iret
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define x86_intrcc void @foo(i8* %frame) {
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call void @bar()
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ret void
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}
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declare void @bar()
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