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d3fb1bcc0c
We used to list registers that were not in the AVX space. In other words, we were pushing registers that the ISA cannot encode (YMM16-YMM31). This is part of llvm.org/PR27481. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@268983 91177308-0d34-0410-b5e6-96231b3b80d8
20 lines
528 B
LLVM
20 lines
528 B
LLVM
; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;; Checks that interrupt handler code does not call "vzeroupper" instruction
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;; before iret.
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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; CHECK: vzeroupper
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; CHECK-NEXT: call
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; CHECK-NOT: vzeroupper
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; CHECK: iret
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define x86_intrcc void @foo(i8* %frame) {
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call void @bar()
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ret void
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}
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declare void @bar()
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