Daniel Sanders 32650944eb [mips][mips64r6] Add experimental support for MIPS32r6 and MIPS64r6 ... Summary: Adds MIPS32r6/MIPS64r6 and checks the compatibility requirements for these processors. I've also included comments to describe removed and re-encoded instructions, along with placeholder def's for the new instructions but there are no functional changes to codegen at this point. Reviewers: jkolek, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3622 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208399 91177308-0d34-0410-b5e6-96231b3b80d8		2014-05-09 09:46:21 +00:00
..
AArch64	AArch64/ARM64: optimise vector selects & enable test	2014-05-07 14:10:27 +00:00
ARM	ARM: support PIC on Windows on ARM	2014-05-09 00:58:32 +00:00
ARM64	[ARM64-BE] Teach fast-isel about how to set up sub-word stack arguments for big endian calls.	2014-05-08 12:53:50 +00:00
CPP
Generic	MC: move test from Generic to COFF	2014-04-23 21:41:07 +00:00
Hexagon	Fix broken CHECK lines	2014-02-16 07:31:05 +00:00
Inputs
Mips	[mips][mips64r6] Add experimental support for MIPS32r6 and MIPS64r6	2014-05-09 09:46:21 +00:00
MSP430	Mark FPB as a reserved register when needed.	2014-04-02 13:13:56 +00:00
NVPTX	Fix the test: DCE optimized away everything.	2014-04-21 17:23:12 +00:00
PowerPC	[PowerPC] Fix rlwimi isel when mask is not constant	2014-04-13 17:10:58 +00:00
R600	R600: Expand i64 ISD:SUB	2014-05-05 21:47:15 +00:00
SPARC	Remove the -disable-cfi option.	2014-05-05 17:33:26 +00:00
SystemZ	Reenable use of TBAA during CodeGen	2014-04-12 01:26:00 +00:00
Thumb	Make this test not match its own filename, when being run from a path that includes the string 'add'.	2014-04-15 22:29:32 +00:00
Thumb2	Move the segmented stack switch to a function attribute	2014-04-10 22:58:43 +00:00
X86	Optimize shufflevector that copies an i64/f64 and zeros the rest.	2014-05-08 23:16:08 +00:00
XCore	Reapply "blockfreq: Rewrite BlockFrequencyInfoImpl"	2014-04-21 17:57:07 +00:00