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class git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7634 91177308-0d34-0410-b5e6-96231b3b80d8
195 lines
6.9 KiB
C++
195 lines
6.9 KiB
C++
//===- Target.td - Target Independent TableGen interface --------*- C++ -*-===//
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//
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// This file defines the target-independent interfaces which should be
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// implemented by each target which is using a TableGen based code generator.
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//
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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//
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// Value types - These values correspond to the register types defined in the
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// ValueTypes.h file.
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//
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class ValueType<int size> { string Namespace = "MVT"; int Size = size; }
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def i1 : ValueType<1>; // One bit boolean value
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def i8 : ValueType<8>; // 8-bit integer value
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def i16 : ValueType<16>; // 16-bit integer value
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def i32 : ValueType<32>; // 32-bit integer value
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def i64 : ValueType<64>; // 64-bit integer value
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def f32 : ValueType<32>; // 32-bit floating point value
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def f64 : ValueType<64>; // 64-bit floating point value
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def f80 : ValueType<80>; // 80-bit floating point value
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//===----------------------------------------------------------------------===//
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// Register file description - These classes are used to fill in the target
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// description classes in llvm/Target/MRegisterInfo.h
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// Register - You should define one instance of this class for each register in
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// the target machine.
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//
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class Register {
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string Namespace = "";
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string Name = "";
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}
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// NamedReg - If the name for the 'def' of the register should not become the
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// "name" of the register, you can use this to specify a custom name instead.
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//
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class NamedReg<string n> : Register {
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let Name = n;
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}
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// RegisterAliases - You should define instances of this class to indicate which
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// registers in the register file are aliased together. This allows the code
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// generator to be careful not to put two values with overlapping live ranges
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// into registers which alias.
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//
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class RegisterAliases<Register reg, list<Register> aliases> {
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Register Reg = reg;
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list<Register> Aliases = aliases;
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}
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// RegisterClass - Now that all of the registers are defined, and aliases
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// between registers are defined, specify which registers belong to which
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// register classes. This also defines the default allocation order of
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// registers by register allocators.
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//
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class RegisterClass<ValueType regType, int alignment, list<Register> regList> {
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// RegType - Specify the ValueType of the registers in this register class.
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// Note that all registers in a register class must have the same ValueType.
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//
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ValueType RegType = regType;
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// Alignment - Specify the alignment required of the registers when they are
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// stored or loaded to memory.
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//
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int Size = RegType.Size;
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int Alignment = alignment;
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// MemberList - Specify which registers are in this class. If the
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// allocation_order_* method are not specified, this also defines the order of
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// allocation used by the register allocator.
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//
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list<Register> MemberList = regList;
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// Methods - This member can be used to insert arbitrary code into a generated
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// register class. The normal usage of this is to overload virtual methods.
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code Methods = [{}];
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}
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//===----------------------------------------------------------------------===//
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// Instruction set description - These classes correspond to the C++ classes in
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// the Target/TargetInstrInfo.h file.
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//
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class Instruction {
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string Name; // The opcode string for this instruction
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string Namespace = "";
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list<Register> Uses = []; // Default to using no non-operand registers
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list<Register> Defs = []; // Default to modifying no non-operand registers
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// These bits capture information about the high-level semantics of the
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// instruction.
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bit isReturn = 0; // Is this instruction a return instruction?
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bit isBranch = 0; // Is this instruction a branch instruction?
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bit isCall = 0; // Is this instruction a call instruction?
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bit isTwoAddress = 0; // Is this a two address instruction?
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bit isTerminator = 0; // Is this part of the terminator for a basic block?
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// Pattern - Set to the DAG pattern for this instruction, if we know of one,
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// otherwise, uninitialized.
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dag Pattern;
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}
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class Expander<dag pattern, list<dag> result> {
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dag Pattern = pattern;
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list<dag> Result = result;
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}
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// InstrInfo - This class should only be instantiated once to provide parameters
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// which are global to the the target machine.
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//
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class InstrInfo {
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Instruction PHIInst;
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// If the target wants to associate some target-specific information with each
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// instruction, it should provide these two lists to indicate how to assemble
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// the target specific information into the 32 bits available.
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//
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list<string> TSFlagsFields = [];
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list<int> TSFlagsShifts = [];
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}
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//===----------------------------------------------------------------------===//
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// Target - This class contains the "global" target information
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//
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class Target {
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// CalleeSavedRegisters - As you might guess, this is a list of the callee
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// saved registers for a target.
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list<Register> CalleeSavedRegisters = [];
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// PointerType - Specify the value type to be used to represent pointers in
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// this target. Typically this is an i32 or i64 type.
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ValueType PointerType;
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// InstructionSet - Instruction set description for this target
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InstrInfo InstructionSet;
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}
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//===----------------------------------------------------------------------===//
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// DAG node definitions used by the instruction selector...
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//
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class DagNodeResultType;
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def DNRT_void : DagNodeResultType; // Tree node always returns void
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def DNRT_val : DagNodeResultType; // A non-void type
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def DNRT_arg0 : DagNodeResultType; // Tree node returns same type as Arg0
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class DagNodeArgType;
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def DNAT_val : DagNodeArgType; // Any value
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def DNAT_arg0 : DagNodeArgType; // Same as for arg #0
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def DNAT_ptr : DagNodeArgType; // Returns the target pointer type
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class DagNode<DagNodeResultType ret, list<DagNodeArgType> args> {
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DagNodeResultType RetType = ret;
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list<DagNodeArgType> ArgTypes = args;
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string EnumName = ?;
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}
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// BuiltinDagNodes are built into the instruction selector and correspond to
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// enum values.
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class BuiltinDagNode<DagNodeResultType Ret, list<DagNodeArgType> Args,
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string Ename> : DagNode<Ret, Args> {
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let EnumName = Ename;
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}
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// Magic nodes...
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def set : DagNode<DNRT_void, [DNAT_val, DNAT_arg0]>;
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// Terminals...
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def imm : DagNode<DNRT_val, []>;
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// Arithmetic...
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def plus : BuiltinDagNode<DNRT_arg0, [DNAT_val, DNAT_arg0], "Plus">;
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def minus : BuiltinDagNode<DNRT_arg0, [DNAT_val, DNAT_arg0], "Minus">;
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//def mult : DagNode<2, DNRT_arg0>;
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//def div : DagNode<2, DNRT_arg0>;
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//def udiv : DagNode<2, DNRT_arg0>;
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//def mod : DagNode<2, DNRT_arg0>;
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//def umod : DagNode<2, DNRT_arg0>;
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//def load : DagNode<1, DNRT_val>;
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//def store : DagNode<2, DNRT_Void>;
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// Other...
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def ret : BuiltinDagNode<DNRT_void, [DNAT_val], "Ret">;
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def retvoid : BuiltinDagNode<DNRT_void, [], "RetVoid">;
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