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bce5921b79
Function computeProcResourceMasks is used by the ResourceManager (owned by the Scheduler) to compute resource masks for processor resources. Before this refactoring, there was an implicit dependency between the Scheduler and the InstrBuilder. That is because InstrBuilder has to know about resource masks when computing the set of processor resources consumed by a new instruction. With this patch, the functionality that computes resource masks has been extracted from the ResourceManager, and moved to a separate file (Support.h). This helps removing the dependency between the Scheduler and the InstrBuilder. No functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@327973 91177308-0d34-0410-b5e6-96231b3b80d8
85 lines
2.3 KiB
C++
85 lines
2.3 KiB
C++
//===--------------------- Backend.cpp --------------------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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///
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/// Implementation of class Backend which emulates an hardware OoO backend.
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///
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//===----------------------------------------------------------------------===//
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#include "Backend.h"
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#include "HWEventListener.h"
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#include "llvm/CodeGen/TargetSchedule.h"
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#include "llvm/Support/Debug.h"
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namespace mca {
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#define DEBUG_TYPE "llvm-mca"
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using namespace llvm;
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void Backend::addEventListener(HWEventListener *Listener) {
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if (Listener)
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Listeners.insert(Listener);
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}
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void Backend::runCycle(unsigned Cycle) {
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notifyCycleBegin(Cycle);
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while (SM.hasNext()) {
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InstRef IR = SM.peekNext();
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std::unique_ptr<Instruction> NewIS(
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IB->createInstruction(IR.first, *IR.second));
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const InstrDesc &Desc = NewIS->getDesc();
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if (!DU->isAvailable(Desc.NumMicroOps) ||
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!DU->canDispatch(IR.first, *NewIS))
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break;
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Instruction *IS = NewIS.get();
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Instructions[IR.first] = std::move(NewIS);
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IS->setRCUTokenID(DU->dispatch(IR.first, IS, STI));
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SM.updateNext();
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}
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notifyCycleEnd(Cycle);
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}
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void Backend::notifyCycleBegin(unsigned Cycle) {
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DEBUG(dbgs() << "[E] Cycle begin: " << Cycle << '\n');
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for (HWEventListener *Listener : Listeners)
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Listener->onCycleBegin(Cycle);
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DU->cycleEvent(Cycle);
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HWS->cycleEvent(Cycle);
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}
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void Backend::notifyInstructionEvent(const HWInstructionEvent &Event) {
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for (HWEventListener *Listener : Listeners)
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Listener->onInstructionEvent(Event);
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}
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void Backend::notifyStallEvent(const HWStallEvent &Event) {
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for (HWEventListener *Listener : Listeners)
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Listener->onStallEvent(Event);
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}
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void Backend::notifyResourceAvailable(const ResourceRef &RR) {
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DEBUG(dbgs() << "[E] Resource Available: [" << RR.first << '.' << RR.second
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<< "]\n");
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for (HWEventListener *Listener : Listeners)
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Listener->onResourceAvailable(RR);
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}
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void Backend::notifyCycleEnd(unsigned Cycle) {
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DEBUG(dbgs() << "[E] Cycle end: " << Cycle << "\n\n");
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for (HWEventListener *Listener : Listeners)
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Listener->onCycleEnd(Cycle);
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}
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} // namespace mca.
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