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llvm/lib/Target/Sparc
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Chris Lattner 7b0902dcf8 Add some simple integer patterns. This allows us to compile this: 
int %test(int %A) {
  %B = add int %A, 1
  %C = xor int %B, 123
  ret int %C
}

into this:

test:
        save -96, %sp, %sp
        add %i0, 1, %l0
        xor %l0, 123, %i0
        restore %g0, %g0, %g0
        retl
        nop

for example.  I guess it would make sense to add reg/reg versions too.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24774 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 08:26:38 +00:00
..
.cvsignore ignore generated files 2005-09-07 23:47:44 +00:00
DelaySlotFiller.cpp Remove trailing whitespace 2005-04-21 23:30:14 +00:00
FPMover.cpp silence some warnings 2005-10-05 17:15:09 +00:00
Makefile Add the framework for a dag-dag isel 2005-12-17 07:47:01 +00:00
README.txt asmprinter done, added crucial missing step 2005-12-17 07:17:59 +00:00
Sparc.h Add the framework for a dag-dag isel 2005-12-17 07:47:01 +00:00
Sparc.td Adjust paths: Sparc/V8 --> SparcV8 2004-12-10 04:48:57 +00:00
SparcAsmPrinter.cpp Use the AsmPrinter for global variable init printing. This eliminates a 2005-12-17 07:17:08 +00:00
SparcInstrFormats.td Add empty patterns for F3_2 instructions 2005-12-17 08:06:43 +00:00
SparcInstrInfo.cpp Remove trailing whitespace 2005-04-21 23:30:14 +00:00
SparcInstrInfo.h Remove trailing whitespace 2005-04-21 23:30:14 +00:00
SparcInstrInfo.td Add some simple integer patterns. This allows us to compile this: 2005-12-17 08:26:38 +00:00
SparcISelDAGToDAG.cpp Implement ret with operand, giving us this: 2005-12-17 08:15:09 +00:00
SparcRegisterInfo.cpp Pass extra regclasses into spilling code 2005-09-30 01:29:42 +00:00
SparcRegisterInfo.h Pass extra regclasses into spilling code 2005-09-30 01:29:42 +00:00
SparcRegisterInfo.td Support multiple ValueTypes per RegisterClass, needed for upcoming vector 2005-12-01 04:51:06 +00:00
SparcTargetMachine.cpp Add the framework for a dag-dag isel 2005-12-17 07:47:01 +00:00
SparcTargetMachine.h Remove JIT support, which doesn't work. 2005-12-16 06:06:07 +00:00
SparcV8ISelSimple.cpp core changes for varargs 2005-06-18 18:34:52 +00:00

README.txt 

Meta TODO list:
1. Create a new DAG -> DAG instruction selector, by adding patterns to the
   instructions.
2. ???
3. profit!


SparcV8 backend skeleton
------------------------

This directory houses a 32-bit SPARC V8 backend employing an expander-based
instruction selector.  It is not yet functionally complete.  Watch
this space for more news coming soon!

Current expected test failures
------------------------------

Here are the currently-expected SingleSource failures for V8
(Some C++ programs are crashing in libstdc++ at the moment;
I'm not sure why.)

  (llc) SingleSource/Regression/C++/EH/exception_spec_test
  (llc) SingleSource/Regression/C++/EH/throw_rethrow_test

Here are the currently-expected MultiSource failures for V8:

  (llc,cbe) MultiSource/Applications/d/make_dparser
  (llc,cbe) MultiSource/Applications/hexxagon
  (llc) MultiSource/Benchmarks/Fhourstones
  (llc,cbe) MultiSource/Benchmarks/McCat/03-testtrie
  (llc) MultiSource/Benchmarks/McCat/18-imp
  (llc,cbe) MultiSource/Benchmarks/Prolangs-C/bison/mybison
  (llc,cbe) MultiSource/Benchmarks/Prolangs-C/fixoutput
  (llc,cbe) MultiSource/Benchmarks/Prolangs-C/gnugo
  (llc,cbe) MultiSource/Benchmarks/Prolangs-C/plot2fig
  (llc,cbe) MultiSource/Benchmarks/Ptrdist/anagram
  (llc,cbe) MultiSource/Benchmarks/FreeBench/analyzer
    * DANGER * analyzer will run the machine out of VM
  (I don't know whether the following fail in cbe:)
  (llc) MultiSource/Benchmarks/FreeBench/distray
  (llc) MultiSource/Benchmarks/FreeBench/fourinarow
  (llc) MultiSource/Benchmarks/FreeBench/pifft
  (llc) MultiSource/Benchmarks/MallocBench/gs
  (llc) MultiSource/Benchmarks/Prolangs-C++/deriv1
  (llc) MultiSource/Benchmarks/Prolangs-C++/deriv2

Known SPEC failures for V8 (probably not an exhaustive list):

  (llc) 134.perl
  (llc) 177.mesa
  (llc) 188.ammp -- FPMover bug?
  (llc) 256.bzip2
  (llc,cbe) 130.li
  (native,llc,cbe) 126.gcc
  (native,llc,cbe) 255.vortex

To-do
-----

* support shl on longs (fourinarow needs this)
* support casting 64-bit integers to FP types (fhourstones needs this)
* support FP rem (call fmod)

* Keep the address of the constant pool in a register instead of forming its
  address all of the time.

* Change code like this:
        or      %o0, %lo(.CPI_main_0), %o0
        ld      [%o0+0], %o0
  into:
        ld	[%o0+%lo(.CPI_main_0)], %o0
  for constant pool access.

* We can fold small constant offsets into the %hi/%lo references to constant
  pool addresses as well.

* Directly support select instructions, and fold setcc instructions into them
  where possible.  I think this is what afflicts the inner loop of Olden/tsp
  (hot block = tsp():no_exit.1.i, overall GCC/LLC = 0.03).

* Generate fsqrtd for calls to sqrt()  (~ 4% speedup on Olden/tsp).

$Date$