Hal Finkel ac81cc3282 Add support for generating reg+reg preinc stores on PPC. ...

PPC will now generate STWUX and friends.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158698 91177308-0d34-0410-b5e6-96231b3b80d8

2012-06-19 02:34:32 +00:00

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Analysis

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Archive

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Assembler

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Bindings/Ocaml

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Bitcode

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BugPoint

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CodeGen

Add support for generating reg+reg preinc stores on PPC.

2012-06-19 02:34:32 +00:00

DebugInfo

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ExecutionEngine

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Feature

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Instrumentation

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Integer

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Linker

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MC

ARM: Define generic HINT instruction.

2012-06-18 19:45:50 +00:00

Object

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Other

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Scripts

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TableGen

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Transforms

Now that SROA can form alloca's for dynamic vector accesses, further improve it to be able to replace operations on these vector alloca's with insert/extract element insts

2012-06-17 03:58:26 +00:00

Unit

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Verifier

revert r158660, since Chris has some issues with this patch (namely using code to reprent information only used by the compiler)

2012-06-18 23:34:26 +00:00

YAMLParser

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CMakeLists.txt

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lit.cfg

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lit.site.cfg.in

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Makefile

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Makefile.tests

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site.exp.in

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TestRunner.sh

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