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e46d723b12
Enable runtime and partial loop unrolling of simple loops without calls on M-class cores. The thresholds are calculated based on whether the target is Thumb or Thumb-2. Differential Revision: https://reviews.llvm.org/D34619 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@308956 91177308-0d34-0410-b5e6-96231b3b80d8
211 lines
10 KiB
LLVM
211 lines
10 KiB
LLVM
; RUN: opt -mtriple=armv7 -mcpu=cortex-a57 -loop-unroll -S %s -o - | FileCheck %s --check-prefix=CHECK-UNROLL-V7
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; RUN: opt -mtriple=thumbv7 -mcpu=cortex-a57 -loop-unroll -S %s -o - | FileCheck %s --check-prefix=CHECK-UNROLL-V7
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; RUN: opt -mtriple=thumbv8m -mcpu=cortex-m23 -loop-unroll -S %s -o - | FileCheck %s --check-prefix=CHECK-UNROLL-SMALL
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; RUN: opt -mtriple=thumbv7m -mcpu=cortex-m4 -loop-unroll -S %s -o - | FileCheck %s --check-prefix=CHECK-UNROLL
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; RUN: opt -mtriple=thumbv8m.main -mcpu=cortex-m33 -loop-unroll -S %s -o - | FileCheck %s --check-prefix=CHECK-UNROLL
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; CHECK-LABEL: partial
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define arm_aapcs_vfpcc void @partial(i32* nocapture %C, i32* nocapture readonly %A, i32* nocapture readonly %B) local_unnamed_addr #0 {
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entry:
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br label %for.body
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; CHECK-LABEL: for.body
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for.body:
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; CHECK-UNROLL-V7: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, %entry ], [ [[IV2:%[a-z.0-9]+]], %for.body ]
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; CHECK-UNROLL-V7: [[IV1:%[a-z.0-9]+]] = add nuw nsw i32 [[IV0]], 1
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; CHECK-UNROLL-V7: [[IV2]] = add nuw nsw i32 [[IV1]], 1
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; CHECK-UNROLL-V7: [[CMP:%[a-z.0-9]+]] = icmp eq i32 [[IV2]], 1024
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; CHECK-UNROLL-V7: br i1 [[CMP]], label [[END:%[a-z.]+]], label %for.body
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; CHECK-UNROLL-SMALL: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, %entry ], [ [[IV8:%[a-z.0-9]+]], %for.body ]
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; CHECK-UNROLL-SMALL: [[IV1:%[a-z.0-9]+]] = add nuw nsw i32 [[IV0]], 1
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; CHECK-UNROLL-SMALL: [[IV2:%[a-z.0-9]+]] = add nuw nsw i32 [[IV1]], 1
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; CHECK-UNROLL-SMALL: [[IV3:%[a-z.0-9]+]] = add nuw nsw i32 [[IV2]], 1
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; CHECK-UNROLL-SMALL: [[IV4:%[a-z.0-9]+]] = add nuw nsw i32 [[IV3]], 1
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; CHECK-UNROLL-SMALL: [[IV5:%[a-z.0-9]+]] = add nuw nsw i32 [[IV4]], 1
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; CHECK-UNROLL-SMALL: [[IV6:%[a-z.0-9]+]] = add nuw nsw i32 [[IV5]], 1
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; CHECK-UNROLL-SMALL: [[IV7:%[a-z.0-9]+]] = add nuw nsw i32 [[IV6]], 1
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; CHECK-UNROLL-SMALL: [[IV8]] = add nuw nsw i32 [[IV7]], 1
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; CHECK-UNROLL-SMALL: [[CMP:%[a-z.0-9]+]] = icmp eq i32 [[IV8]], 1024
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; CHECK-UNROLL-SMALL: br i1 [[CMP]], label [[END:%[a-z.]+]], label %for.body
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; CHECK-UNROLL: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, %entry ], [ [[IV16:%[a-z.0-9]+]], %for.body ]
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; CHECK-UNROLL: [[IV1:%[a-z.0-9]+]] = add nuw nsw i32 [[IV0]], 1
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; CHECK-UNROLL: [[IV2:%[a-z.0-9]+]] = add nuw nsw i32 [[IV1]], 1
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; CHECK-UNROLL: [[IV3:%[a-z.0-9]+]] = add nuw nsw i32 [[IV2]], 1
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; CHECK-UNROLL: [[IV4:%[a-z.0-9]+]] = add nuw nsw i32 [[IV3]], 1
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; CHECK-UNROLL: [[IV5:%[a-z.0-9]+]] = add nuw nsw i32 [[IV4]], 1
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; CHECK-UNROLL: [[IV6:%[a-z.0-9]+]] = add nuw nsw i32 [[IV5]], 1
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; CHECK-UNROLL: [[IV7:%[a-z.0-9]+]] = add nuw nsw i32 [[IV6]], 1
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; CHECK-UNROLL: [[IV8:%[a-z.0-9]+]] = add nuw nsw i32 [[IV7]], 1
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; CHECK-UNROLL: [[IV9:%[a-z.0-9]+]] = add nuw nsw i32 [[IV8]], 1
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; CHECK-UNROLL: [[IV10:%[a-z.0-9]+]] = add nuw nsw i32 [[IV9]], 1
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; CHECK-UNROLL: [[IV11:%[a-z.0-9]+]] = add nuw nsw i32 [[IV10]], 1
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; CHECK-UNROLL: [[IV12:%[a-z.0-9]+]] = add nuw nsw i32 [[IV11]], 1
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; CHECK-UNROLL: [[IV13:%[a-z.0-9]+]] = add nuw nsw i32 [[IV12]], 1
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; CHECK-UNROLL: [[IV14:%[a-z.0-9]+]] = add nuw nsw i32 [[IV13]], 1
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; CHECK-UNROLL: [[IV15:%[a-z.0-9]+]] = add nuw nsw i32 [[IV14]], 1
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; CHECK-UNROLL: [[IV16]] = add nuw nsw i32 [[IV15]], 1
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; CHECK-UNROLL: [[CMP:%[a-z.0-9]+]] = icmp eq i32 [[IV16]], 1024
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; CHECK-UNROLL: br i1 [[CMP]], label [[END:%[a-z.]+]], label %for.body
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%i.08 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%arrayidx = getelementptr inbounds i32, i32* %A, i32 %i.08
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%0 = load i32, i32* %arrayidx, align 4
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%arrayidx1 = getelementptr inbounds i32, i32* %B, i32 %i.08
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%1 = load i32, i32* %arrayidx1, align 4
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%mul = mul nsw i32 %1, %0
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%arrayidx2 = getelementptr inbounds i32, i32* %C, i32 %i.08
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store i32 %mul, i32* %arrayidx2, align 4
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%inc = add nuw nsw i32 %i.08, 1
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%exitcond = icmp eq i32 %inc, 1024
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br i1 %exitcond, label %for.cond.cleanup, label %for.body
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for.cond.cleanup:
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ret void
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}
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; CHECK-LABEL: runtime
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define arm_aapcs_vfpcc void @runtime(i32* nocapture %C, i32* nocapture readonly %A, i32* nocapture readonly %B, i32 %N) local_unnamed_addr #0 {
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entry:
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%cmp8 = icmp eq i32 %N, 0
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br i1 %cmp8, label %for.cond.cleanup, label %for.body
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; CHECK-LABEL: for.body
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for.body:
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; CHECK-UNROLL-V7: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, [[PRE:%[a-z.0-9]+]] ], [ [[IV8:%[a-z.0-9]+]], %for.body ]
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; CHECK-UNROLL-V7: [[IV1:%[a-z.0-9]+]] = add nuw nsw i32 [[IV0]], 1
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; CHECK-UNROLL-V7: [[IV2]] = add nuw i32 [[IV1]], 1
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; CHECK-UNROLL-SMALL: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, [[PRE:%[a-z.0-9]+]] ], [ [[IV8:%[a-z.0-9]+]], %for.body ]
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; CHECK-UNROLL-SMALL: [[IV1:%[a-z.0-9]+]] = add nuw nsw i32 [[IV0]], 1
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; CHECK-UNROLL-SMALL: [[IV2:%[a-z.0-9]+]] = add nuw nsw i32 [[IV1]], 1
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; CHECK-UNROLL-SMALL: [[IV3:%[a-z.0-9]+]] = add nuw nsw i32 [[IV2]], 1
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; CHECK-UNROLL-SMALL: [[IV4:%[a-z.0-9]+]] = add nuw nsw i32 [[IV3]], 1
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; CHECK-UNROLL-SMALL: [[IV5:%[a-z.0-9]+]] = add nuw nsw i32 [[IV4]], 1
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; CHECK-UNROLL-SMALL: [[IV6:%[a-z.0-9]+]] = add nuw nsw i32 [[IV5]], 1
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; CHECK-UNROLL-SMALL: [[IV7:%[a-z.0-9]+]] = add nuw nsw i32 [[IV6]], 1
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; CHECK-UNROLL-SMALL: [[IV8]] = add nuw i32 [[IV7]], 1
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; CHECK-UNROLL: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, [[PRE:%[a-z.0-9]+]] ], [ [[IV8:%[a-z.0-9]+]], %for.body ]
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; CHECK-UNROLL: [[IV1:%[a-z.0-9]+]] = add nuw nsw i32 [[IV0]], 1
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; CHECK-UNROLL: [[IV2:%[a-z.0-9]+]] = add nuw nsw i32 [[IV1]], 1
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; CHECK-UNROLL: [[IV3:%[a-z.0-9]+]] = add nuw nsw i32 [[IV2]], 1
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; CHECK-UNROLL: [[IV4:%[a-z.0-9]+]] = add nuw nsw i32 [[IV3]], 1
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; CHECK-UNROLL: [[IV5:%[a-z.0-9]+]] = add nuw nsw i32 [[IV4]], 1
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; CHECK-UNROLL: [[IV6:%[a-z.0-9]+]] = add nuw nsw i32 [[IV5]], 1
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; CHECK-UNROLL: [[IV7:%[a-z.0-9]+]] = add nuw nsw i32 [[IV6]], 1
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; CHECK-UNROLL: [[IV8]] = add nuw i32 [[IV7]], 1
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%i.09 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
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%arrayidx = getelementptr inbounds i32, i32* %A, i32 %i.09
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%0 = load i32, i32* %arrayidx, align 4
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%arrayidx1 = getelementptr inbounds i32, i32* %B, i32 %i.09
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%1 = load i32, i32* %arrayidx1, align 4
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%mul = mul nsw i32 %1, %0
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%arrayidx2 = getelementptr inbounds i32, i32* %C, i32 %i.09
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store i32 %mul, i32* %arrayidx2, align 4
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%inc = add nuw i32 %i.09, 1
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%exitcond = icmp eq i32 %inc, %N
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br i1 %exitcond, label %for.cond.cleanup, label %for.body
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for.cond.cleanup:
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ret void
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}
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; CHECK-LABEL: nested_runtime
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define arm_aapcs_vfpcc void @nested_runtime(i32* nocapture %C, i16* nocapture readonly %A, i16* nocapture readonly %B, i32 %N) local_unnamed_addr #0 {
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entry:
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%cmp25 = icmp eq i32 %N, 0
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br i1 %cmp25, label %for.cond.cleanup, label %for.body4.lr.ph
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for.body4.lr.ph:
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%h.026 = phi i32 [ %inc11, %for.cond.cleanup3 ], [ 0, %entry ]
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%mul = mul i32 %h.026, %N
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br label %for.body4
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for.cond.cleanup:
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ret void
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for.cond.cleanup3:
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%inc11 = add nuw i32 %h.026, 1
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%exitcond27 = icmp eq i32 %inc11, %N
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br i1 %exitcond27, label %for.cond.cleanup, label %for.body4.lr.ph
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; CHECK-LABEL: for.body4
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for.body4:
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; CHECK-UNROLL-V7: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, [[PRE:%[a-z0-9.]+]] ], [ [[IV1:%[a-z.0-9]+]], %for.body4 ]
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; CHECK-UNROLL-V7: [[IV1:%[a-z.0-9]+]] = add nuw i32 [[IV0]], 1
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; CHECK-UNROLL-SMALL: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, [[PRE:%[a-z0-9.]+]] ], [ [[IV4:%[a-z.0-9]+]], %for.body4 ]
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; CHECK-UNROLL-SMALL: [[IV1:%[a-z.0-9]+]] = add nuw nsw i32 [[IV0]], 1
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; CHECK-UNROLL-SMALL: [[IV2:%[a-z.0-9]+]] = add nuw nsw i32 [[IV1]], 1
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; CHECK-UNROLL-SMALL: [[IV3:%[a-z.0-9]+]] = add nuw nsw i32 [[IV2]], 1
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; CHECK-UNROLL-SMALL: [[IV4]] = add nuw i32 [[IV3]], 1
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; CHECK-UNROLL: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, [[PRE:%[a-z0-9.]+]] ], [ [[IV8:%[a-z.0-9]+]], %for.body4 ]
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; CHECK-UNROLL: [[IV1:%[a-z.0-9]+]] = add nuw nsw i32 [[IV0]], 1
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; CHECK-UNROLL: [[IV2:%[a-z.0-9]+]] = add nuw nsw i32 [[IV1]], 1
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; CHECK-UNROLL: [[IV3:%[a-z.0-9]+]] = add nuw nsw i32 [[IV2]], 1
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; CHECK-UNROLL: [[IV4:%[a-z.0-9]+]] = add nuw nsw i32 [[IV3]], 1
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; CHECK-UNROLL: [[IV5:%[a-z.0-9]+]] = add nuw nsw i32 [[IV4]], 1
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; CHECK-UNROLL: [[IV6:%[a-z.0-9]+]] = add nuw nsw i32 [[IV5]], 1
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; CHECK-UNROLL: [[IV7:%[a-z.0-9]+]] = add nuw nsw i32 [[IV6]], 1
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; CHECK-UNROLL: [[IV8:%[a-z.0-9]+]] = add nuw i32 [[IV7]], 1
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%w.024 = phi i32 [ 0, %for.body4.lr.ph ], [ %inc, %for.body4 ]
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%add = add i32 %w.024, %mul
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%arrayidx = getelementptr inbounds i16, i16* %A, i32 %add
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%0 = load i16, i16* %arrayidx, align 2
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%conv = sext i16 %0 to i32
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%arrayidx5 = getelementptr inbounds i16, i16* %B, i32 %w.024
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%1 = load i16, i16* %arrayidx5, align 2
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%conv6 = sext i16 %1 to i32
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%mul7 = mul nsw i32 %conv6, %conv
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%arrayidx8 = getelementptr inbounds i32, i32* %C, i32 %w.024
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%2 = load i32, i32* %arrayidx8, align 4
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%add9 = add nsw i32 %mul7, %2
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store i32 %add9, i32* %arrayidx8, align 4
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%inc = add nuw i32 %w.024, 1
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%exitcond = icmp eq i32 %inc, %N
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br i1 %exitcond, label %for.cond.cleanup3, label %for.body4
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}
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; CHECK-LABEL: loop_call
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define arm_aapcs_vfpcc void @loop_call(i32* nocapture %C, i32* nocapture readonly %A, i32* nocapture readonly %B) local_unnamed_addr #1 {
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entry:
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br label %for.body
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for.cond.cleanup:
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ret void
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; CHECK-LABEL: for.body
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for.body:
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; CHECK-UNROLL-V7: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, %entry ], [ [[IV1:%[a-z.0-9]+]], %for.body ]
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; CHECK-UNROLL-V7: [[IV1]] = add nuw nsw i32 [[IV0]], 1
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; CHECK-UNROLL-V7: icmp eq i32 [[IV1]], 1024
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; CHECK-UNROLL-SMALL: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, %entry ], [ [[IV1:%[a-z.0-9]+]], %for.body ]
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; CHECK-UNROLL-SMALL: [[IV1]] = add nuw nsw i32 [[IV0]], 1
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; CHECK-UNROLL-SMALL: icmp eq i32 [[IV1]], 1024
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; CHECK-UNROLL: [[IV0:%[a-z.0-9]+]] = phi i32 [ 0, %entry ], [ [[IV1:%[a-z.0-9]+]], %for.body ]
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; CHECK-UNROLL: [[IV1]] = add nuw nsw i32 [[IV0]], 1
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; CHECK-UNROLL: icmp eq i32 [[IV1]], 1024
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%i.08 = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%arrayidx = getelementptr inbounds i32, i32* %A, i32 %i.08
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%0 = load i32, i32* %arrayidx, align 4
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%arrayidx1 = getelementptr inbounds i32, i32* %B, i32 %i.08
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%1 = load i32, i32* %arrayidx1, align 4
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%call = tail call arm_aapcs_vfpcc i32 @some_func(i32 %0, i32 %1) #3
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%arrayidx2 = getelementptr inbounds i32, i32* %C, i32 %i.08
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store i32 %call, i32* %arrayidx2, align 4
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%inc = add nuw nsw i32 %i.08, 1
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%exitcond = icmp eq i32 %inc, 1024
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br i1 %exitcond, label %for.cond.cleanup, label %for.body
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}
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declare arm_aapcs_vfpcc i32 @some_func(i32, i32) local_unnamed_addr #2
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