Krzysztof Parzyszek beae29ccd4 [Hexagon] Remove incorrect pattern for swiz ...

The pattern had a couple of problems:
- It was checking for loads of bytes in the reverse order to what it
  should have been looking for.
- It would replace loads of bytes with a load of a word without making
  sure that the alignment was correct.

Thanks to Eli Friedman for pointing it out.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@343514 91177308-0d34-0410-b5e6-96231b3b80d8

2018-10-01 18:24:40 +00:00

..

AArch64

DAGCombiner: StoreMerging: Fix bad index calculating when adjusting mismatching vector types

2018-10-01 16:25:50 +00:00

AMDGPU

[PHIElimination] Lower a PHI node with only undef uses as IMPLICIT_DEF

2018-09-30 17:26:58 +00:00

ARC

…

ARM

[ARM] Fix correctness checks in promoteToConstantPool.

2018-09-28 20:27:31 +00:00

AVR

[AVR] Redefine the 'LSL' instruction as an alias of 'ADD'

2018-09-01 12:23:00 +00:00

BPF

[bpf] Test case for symbol information in object file

2018-09-22 17:31:01 +00:00

Generic

Re-submitting changes in D51550 because it failed to patch.

2018-09-24 20:47:12 +00:00

Hexagon

[Hexagon] Remove incorrect pattern for swiz

2018-10-01 18:24:40 +00:00

Inputs

…

Lanai

Remove SETCCE use from Lanai's backend

2018-06-03 12:56:24 +00:00

Mips

[mips] Generate tests expectations using update_llc_test_checks. NFC

2018-10-01 14:43:07 +00:00

MIR

MIRParser: Check that instructions only reference DILocation metadata

2018-10-01 17:50:52 +00:00

MSP430

[DAGCombiner] Add X / X -> 1 & X % X -> 0 folds (test tweaks)

2018-08-29 11:18:14 +00:00

Nios2

[Nios2] Arithmetic instructions for R1 and R2 ISA.

2018-01-09 11:15:08 +00:00

NVPTX

[NVPTX] Implement isLegalToVectorizeLoadChain

2018-08-27 17:29:43 +00:00

PowerPC

[PHIElimination] Update the regression test for PR16508

2018-09-30 17:23:21 +00:00

RISCV

[RISCV] Codegen for i8, i16, and i32 atomicrmw with RV32A

2018-09-19 10:54:22 +00:00

SPARC

[Sparc] Remove the support for builtin setjmp/longjmp

2018-09-27 13:32:54 +00:00

SystemZ

[DAGCombiner] Add X / X -> 1 & X % X -> 0 folds (test tweaks)

2018-08-29 11:18:14 +00:00

Thumb

Revert "Revert "[ConstHoist] Do not rebase single (or few) dependent constant""

2018-09-26 00:59:09 +00:00

Thumb2

[ARM] Do not fuse VADD and VMUL on the Cortex-M4 and Cortex-M33

2018-09-24 12:02:50 +00:00

WebAssembly

[WebAssembly] SIMD conversions

2018-09-26 00:34:36 +00:00

WinCFGuard

[COFF] Emit @feat.00 on 64-bit and set the CFG bit when emitting guardcf tables

2018-09-19 09:58:30 +00:00

WinEH

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

X86

[X86] Enable load folding in the test shrinking code

2018-10-01 17:10:50 +00:00

XCore

[DAGCombiner] extend(ifpositive(X)) -> shift-right (not X)

2018-07-15 16:27:07 +00:00