Matt Arsenault c009e3de76 LSR: Check more intrinsic pointer operands ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@320424 91177308-0d34-0410-b5e6-96231b3b80d8

2017-12-11 21:38:43 +00:00

..

AArch64

[GlobalISel] Disable GISel for big endian.

2017-12-11 16:58:29 +00:00

AMDGPU

LSR: Check more intrinsic pointer operands

2017-12-11 21:38:43 +00:00

ARC

[ARC] Add ARC backend.

2017-08-24 15:40:33 +00:00

ARM

[GlobalISel] Disable GISel for big endian.

2017-12-11 16:58:29 +00:00

AVR

[AVR] Fix two CodeGen tests

2017-12-09 07:51:43 +00:00

BPF

[CodeGen] Print register names in lowercase in both MIR and debug output

2017-11-28 17:15:09 +00:00

Generic

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

Hexagon

[Hexagon] Add support for Hexagon V65

2017-12-11 18:57:54 +00:00

Inputs

…

Lanai

[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.

2017-12-07 10:40:31 +00:00

Mips

[mips] Removal of microMIPS64R6

2017-12-11 11:21:40 +00:00

MIR

Skip DBG instr in OptimizePHIs when looking for dead PHI cycles

2017-12-07 07:01:21 +00:00

MSP430

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

Nios2

[Nios2] final infrastructure to provide compilation of a return from a function

2017-12-07 12:35:02 +00:00

NVPTX

[NVPTX,CUDA] Added llvm.nvvm.fns intrinsic and matching __nvvm_fns builtin in clang.

2017-12-06 17:50:05 +00:00

PowerPC

[PowerPC] Partially enable the ISEL expansion pass.

2017-12-11 20:42:37 +00:00

RISCV

[RISCV] Add custom CC_RISCV calling convention and improved call support

2017-12-11 12:49:02 +00:00

SPARC

[CodeGen] Unify MBB reference format in both MIR and debug output

2017-12-04 17:18:51 +00:00

SystemZ

[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.

2017-12-07 10:40:31 +00:00

Thumb

[CodeGen] Always use printReg to print registers in both MIR and debug

2017-11-30 16:12:24 +00:00

Thumb2

[CodeGen] Use MachineOperand::print in the MIRPrinter for MO_Register.

2017-12-07 10:40:31 +00:00

WebAssembly

[WebAssembly] Reapply r319186: "Support bitcasted function addresses with varargs."

2017-12-08 21:27:00 +00:00

WinEH

Make x86 __ehhandler comdat if parent function is

2017-10-20 17:04:43 +00:00

X86

[X86] Add LODS schedule tests

2017-12-11 18:39:42 +00:00

XCore

[MC] Suppress .Lcfi labels when emitting textual assembly

2017-10-10 00:57:36 +00:00