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to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@351636 91177308-0d34-0410-b5e6-96231b3b80d8
103 lines
3.2 KiB
C++
103 lines
3.2 KiB
C++
//===-- SparcSubtarget.cpp - SPARC Subtarget Information ------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the SPARC specific subclass of TargetSubtargetInfo.
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//
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//===----------------------------------------------------------------------===//
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#include "SparcSubtarget.h"
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#include "Sparc.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Support/TargetRegistry.h"
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using namespace llvm;
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#define DEBUG_TYPE "sparc-subtarget"
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#define GET_SUBTARGETINFO_TARGET_DESC
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#define GET_SUBTARGETINFO_CTOR
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#include "SparcGenSubtargetInfo.inc"
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void SparcSubtarget::anchor() { }
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SparcSubtarget &SparcSubtarget::initializeSubtargetDependencies(StringRef CPU,
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StringRef FS) {
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UseSoftMulDiv = false;
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IsV9 = false;
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IsLeon = false;
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V8DeprecatedInsts = false;
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IsVIS = false;
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IsVIS2 = false;
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IsVIS3 = false;
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HasHardQuad = false;
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UsePopc = false;
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UseSoftFloat = false;
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HasNoFSMULD = false;
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HasNoFMULS = false;
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// Leon features
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HasLeonCasa = false;
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HasUmacSmac = false;
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HasPWRPSR = false;
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InsertNOPLoad = false;
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FixAllFDIVSQRT = false;
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DetectRoundChange = false;
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HasLeonCycleCounter = false;
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// Determine default and user specified characteristics
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std::string CPUName = CPU;
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if (CPUName.empty())
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CPUName = (Is64Bit) ? "v9" : "v8";
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// Parse features string.
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ParseSubtargetFeatures(CPUName, FS);
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// Popc is a v9-only instruction.
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if (!IsV9)
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UsePopc = false;
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return *this;
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}
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SparcSubtarget::SparcSubtarget(const Triple &TT, const std::string &CPU,
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const std::string &FS, const TargetMachine &TM,
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bool is64Bit)
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: SparcGenSubtargetInfo(TT, CPU, FS), TargetTriple(TT), Is64Bit(is64Bit),
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InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this),
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FrameLowering(*this) {}
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int SparcSubtarget::getAdjustedFrameSize(int frameSize) const {
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if (is64Bit()) {
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// All 64-bit stack frames must be 16-byte aligned, and must reserve space
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// for spilling the 16 window registers at %sp+BIAS..%sp+BIAS+128.
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frameSize += 128;
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// Frames with calls must also reserve space for 6 outgoing arguments
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// whether they are used or not. LowerCall_64 takes care of that.
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frameSize = alignTo(frameSize, 16);
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} else {
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// Emit the correct save instruction based on the number of bytes in
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// the frame. Minimum stack frame size according to V8 ABI is:
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// 16 words for register window spill
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// 1 word for address of returned aggregate-value
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// + 6 words for passing parameters on the stack
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// ----------
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// 23 words * 4 bytes per word = 92 bytes
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frameSize += 92;
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// Round up to next doubleword boundary -- a double-word boundary
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// is required by the ABI.
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frameSize = alignTo(frameSize, 8);
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}
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return frameSize;
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}
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bool SparcSubtarget::enableMachineScheduler() const {
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return true;
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}
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