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d0c143de76
Modify GenerateConstantOffsetsImpl to create offsets that can be used by indexed addressing modes. If formulae can be generated which result in the constant offset being the same size as the recurrence, we can generate a pre-indexed access. This allows the pointer to be updated via the single pre-indexed access so that (hopefully) no add/subs are required to update it for the next iteration. For small cores, this can significantly improve performance DSP-like loops. Differential Revision: https://reviews.llvm.org/D55373 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353403 91177308-0d34-0410-b5e6-96231b3b80d8
50 lines
1.4 KiB
LLVM
50 lines
1.4 KiB
LLVM
; RUN: llc -mtriple=thumbv7m-none-eabi %s -mcpu=cortex-m3 -o - | FileCheck %s
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; RUN: llc -mtriple=thumbv7m-none-eabi %s -mcpu=cortex-m4 -o - | FileCheck %s
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; RUN: llc -mtriple=thumbv8m-none-eabi %s -mcpu=cortex-m33 -o - | FileCheck %s
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define void @test_loop_alignment(i32* %in, i32* %out) optsize {
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; CHECK-LABEL: test_loop_alignment:
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; CHECK: mov{{.*}}, #0
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; CHECK: .p2align 2
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entry:
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br label %loop
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loop:
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%i = phi i32 [ 0, %entry ], [ %i.next, %loop ]
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%in.addr = getelementptr inbounds i32, i32* %in, i32 %i
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%lhs = load i32, i32* %in.addr, align 4
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%res = mul nsw i32 %lhs, 5
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%out.addr = getelementptr inbounds i32, i32* %out, i32 %i
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store i32 %res, i32* %out.addr, align 4
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%i.next = add i32 %i, 1
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%done = icmp eq i32 %i.next, 1024
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br i1 %done, label %end, label %loop
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end:
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ret void
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}
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define void @test_loop_alignment_minsize(i32* %in, i32* %out) minsize {
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; CHECK-LABEL: test_loop_alignment_minsize:
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; CHECK: movs {{r[0-9]+}}, #0
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; CHECK-NOT: .p2align
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entry:
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br label %loop
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loop:
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%i = phi i32 [ 0, %entry ], [ %i.next, %loop ]
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%in.addr = getelementptr inbounds i32, i32* %in, i32 %i
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%lhs = load i32, i32* %in.addr, align 4
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%res = mul nsw i32 %lhs, 5
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%out.addr = getelementptr inbounds i32, i32* %out, i32 %i
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store i32 %res, i32* %out.addr, align 4
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%i.next = add i32 %i, 1
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%done = icmp eq i32 %i.next, 1024
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br i1 %done, label %end, label %loop
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end:
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ret void
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}
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