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df01cb5e33
I noticed that we are missing this canonicalization in IR: rL352515 ...and then realized that we don't get this right in SDAG either, so this has to be fixed first regardless of what we choose to do in IR. The existing fold was limited to scalars and using the wrong predicate to guard the transform. We have a boolean contents TLI query that can be used to decide which direction to fold. This may eventually lead back to the problems/question in: https://bugs.llvm.org/show_bug.cgi?id=40486 ...but it makes no difference to that yet. Differential Revision: https://reviews.llvm.org/D57401 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@353433 91177308-0d34-0410-b5e6-96231b3b80d8
155 lines
4.1 KiB
LLVM
155 lines
4.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=powerpc64le-- -verify-machineinstrs | FileCheck %s
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define i32 @sub_zext_cmp_mask_same_size_result(i32 %x) {
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; CHECK-LABEL: sub_zext_cmp_mask_same_size_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: clrldi 3, 3, 63
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; CHECK-NEXT: ori 3, 3, 65508
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; CHECK-NEXT: oris 3, 3, 65535
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; CHECK-NEXT: blr
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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%z = zext i1 %c to i32
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%r = sub i32 -27, %z
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ret i32 %r
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}
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define i32 @sub_zext_cmp_mask_wider_result(i8 %x) {
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; CHECK-LABEL: sub_zext_cmp_mask_wider_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: clrldi 3, 3, 63
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; CHECK-NEXT: ori 3, 3, 26
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; CHECK-NEXT: blr
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%a = and i8 %x, 1
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%c = icmp eq i8 %a, 0
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%z = zext i1 %c to i32
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%r = sub i32 27, %z
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ret i32 %r
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}
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define i8 @sub_zext_cmp_mask_narrower_result(i32 %x) {
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; CHECK-LABEL: sub_zext_cmp_mask_narrower_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: clrldi 3, 3, 63
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; CHECK-NEXT: ori 3, 3, 46
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; CHECK-NEXT: blr
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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%z = zext i1 %c to i8
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%r = sub i8 47, %z
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ret i8 %r
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}
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define i8 @add_zext_cmp_mask_same_size_result(i8 %x) {
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; CHECK-LABEL: add_zext_cmp_mask_same_size_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: rlwinm 3, 3, 0, 31, 31
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; CHECK-NEXT: subfic 3, 3, 27
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; CHECK-NEXT: blr
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%a = and i8 %x, 1
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%c = icmp eq i8 %a, 0
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%z = zext i1 %c to i8
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%r = add i8 %z, 26
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ret i8 %r
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}
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define i32 @add_zext_cmp_mask_wider_result(i8 %x) {
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; CHECK-LABEL: add_zext_cmp_mask_wider_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: rlwinm 3, 3, 0, 31, 31
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; CHECK-NEXT: subfic 3, 3, 27
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; CHECK-NEXT: blr
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%a = and i8 %x, 1
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%c = icmp eq i8 %a, 0
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%z = zext i1 %c to i32
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%r = add i32 %z, 26
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ret i32 %r
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}
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define i8 @add_zext_cmp_mask_narrower_result(i32 %x) {
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; CHECK-LABEL: add_zext_cmp_mask_narrower_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: rlwinm 3, 3, 0, 31, 31
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; CHECK-NEXT: subfic 3, 3, 43
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; CHECK-NEXT: blr
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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%z = zext i1 %c to i8
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%r = add i8 %z, 42
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ret i8 %r
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}
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define i32 @low_bit_select_constants_bigger_false_same_size_result(i32 %x) {
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; CHECK-LABEL: low_bit_select_constants_bigger_false_same_size_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: clrldi 3, 3, 63
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; CHECK-NEXT: ori 3, 3, 42
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; CHECK-NEXT: blr
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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%r = select i1 %c, i32 42, i32 43
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ret i32 %r
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}
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define i64 @low_bit_select_constants_bigger_false_wider_result(i32 %x) {
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; CHECK-LABEL: low_bit_select_constants_bigger_false_wider_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: clrldi 3, 3, 63
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; CHECK-NEXT: ori 3, 3, 26
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; CHECK-NEXT: blr
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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%r = select i1 %c, i64 26, i64 27
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ret i64 %r
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}
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define i16 @low_bit_select_constants_bigger_false_narrower_result(i32 %x) {
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; CHECK-LABEL: low_bit_select_constants_bigger_false_narrower_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: clrldi 3, 3, 63
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; CHECK-NEXT: ori 3, 3, 36
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; CHECK-NEXT: blr
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%a = and i32 %x, 1
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%c = icmp eq i32 %a, 0
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%r = select i1 %c, i16 36, i16 37
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ret i16 %r
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}
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define i8 @low_bit_select_constants_bigger_true_same_size_result(i8 %x) {
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; CHECK-LABEL: low_bit_select_constants_bigger_true_same_size_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: rlwinm 3, 3, 0, 31, 31
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; CHECK-NEXT: subfic 3, 3, -29
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; CHECK-NEXT: blr
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%a = and i8 %x, 1
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%c = icmp eq i8 %a, 0
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%r = select i1 %c, i8 227, i8 226
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ret i8 %r
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}
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define i32 @low_bit_select_constants_bigger_true_wider_result(i8 %x) {
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; CHECK-LABEL: low_bit_select_constants_bigger_true_wider_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: clrldi 3, 3, 63
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; CHECK-NEXT: subfic 3, 3, 227
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; CHECK-NEXT: blr
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%a = and i8 %x, 1
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%c = icmp eq i8 %a, 0
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%r = select i1 %c, i32 227, i32 226
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ret i32 %r
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}
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define i8 @low_bit_select_constants_bigger_true_narrower_result(i16 %x) {
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; CHECK-LABEL: low_bit_select_constants_bigger_true_narrower_result:
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; CHECK: # %bb.0:
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; CHECK-NEXT: rlwinm 3, 3, 0, 31, 31
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; CHECK-NEXT: subfic 3, 3, 41
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; CHECK-NEXT: blr
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%a = and i16 %x, 1
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%c = icmp eq i16 %a, 0
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%r = select i1 %c, i8 41, i8 40
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ret i8 %r
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}
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