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llvm/lib/Target/AMDGPU
History
Matt Arsenault 1cd0962919 AMDGPU: Set isMoveImm on s_movk_i32 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@242747 91177308-0d34-0410-b5e6-96231b3b80d8
2015-07-21 00:40:08 +00:00
..
AsmParser
Reverting r241058 because it's causing buildbot failures.
2015-06-30 12:32:53 +00:00
InstPrinter
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MCTargetDesc
MC: Remove MCSubtargetInfo() default constructor
2015-07-10 22:43:42 +00:00
TargetInfo
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Utils
AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support
2015-06-26 21:58:31 +00:00
AMDGPU.h
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AMDGPU.td
AMDPGU/SI: Use AssertZext node to mask high bit for scratch offsets
2015-07-16 19:40:07 +00:00
AMDGPUAlwaysInlinePass.cpp
AMDGPU: Minor cleanups to always inline pass
2015-07-13 19:08:36 +00:00
AMDGPUAsmPrinter.cpp
AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support
2015-06-26 21:58:31 +00:00
AMDGPUAsmPrinter.h
AMDGPU/SI: Emit amd_kernel_code_t in EmitFunctionBodyStart()
2015-06-26 21:14:58 +00:00
AMDGPUCallingConv.td
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AMDGPUFrameLowering.cpp
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AMDGPUFrameLowering.h
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AMDGPUInstrInfo.cpp
Remove TargetInstrInfo::canFoldMemoryOperand
2015-07-19 10:50:53 +00:00
AMDGPUInstrInfo.h
Remove TargetInstrInfo::canFoldMemoryOperand
2015-07-19 10:50:53 +00:00
AMDGPUInstrInfo.td
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AMDGPUInstructions.td
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AMDGPUIntrinsicInfo.cpp
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AMDGPUIntrinsicInfo.h
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AMDGPUIntrinsics.td
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AMDGPUISelDAGToDAG.cpp
AMDGPU/SI: Add VI patterns to select FLAT instructions for global memory ops
2015-07-20 14:28:41 +00:00
AMDGPUISelLowering.cpp
AMDGPU: Avoid using 64-bit shift for i64 (shl x, 32)
2015-07-14 18:20:33 +00:00
AMDGPUISelLowering.h
AMDGPU: Avoid using 64-bit shift for i64 (shl x, 32)
2015-07-14 18:20:33 +00:00
AMDGPUMachineFunction.cpp
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AMDGPUMachineFunction.h
Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
2015-06-23 09:49:53 +00:00
AMDGPUMCInstLower.cpp
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AMDGPUMCInstLower.h
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AMDGPUPromoteAlloca.cpp
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AMDGPURegisterInfo.cpp
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AMDGPURegisterInfo.h
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AMDGPURegisterInfo.td
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AMDGPUSubtarget.cpp
AMDPGU/SI: Use AssertZext node to mask high bit for scratch offsets
2015-07-16 19:40:07 +00:00
AMDGPUSubtarget.h
AMDPGU/SI: Use AssertZext node to mask high bit for scratch offsets
2015-07-16 19:40:07 +00:00
AMDGPUTargetMachine.cpp
AMDGPU/SI: Fix read2 merging into a super register.
2015-07-14 17:57:36 +00:00
AMDGPUTargetMachine.h
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AMDGPUTargetTransformInfo.cpp
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AMDGPUTargetTransformInfo.h
Make TargetTransformInfo keeping a reference to the Module DataLayout
2015-07-09 02:08:42 +00:00
AMDILCFGStructurizer.cpp
AMDGPU/R600: Remove unused variable
2015-07-16 16:13:34 +00:00
AMDKernelCodeT.h
AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support
2015-06-26 21:58:31 +00:00
CaymanInstructions.td
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CIInstructions.td
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CMakeLists.txt
AMDGPU/SI: Add hsa code object directives
2015-06-26 21:15:07 +00:00
EvergreenInstructions.td
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LLVMBuild.txt
AMDGPU/SI: Add hsa code object directives
2015-06-26 21:15:07 +00:00
Makefile
AMDGPU/SI: Add hsa code object directives
2015-06-26 21:15:07 +00:00
Processors.td
AMDGPU/SI: Add hsa code object directives
2015-06-26 21:15:07 +00:00
R600ClauseMergePass.cpp
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R600ControlFlowFinalizer.cpp
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R600Defines.h
Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
2015-06-23 09:49:53 +00:00
R600EmitClauseMarkers.cpp
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R600ExpandSpecialInstrs.cpp
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R600InstrFormats.td
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R600InstrInfo.cpp
Replace copy-pasted debug value skipping with MBB::getLastNonDebugInstr
2015-06-25 13:28:24 +00:00
R600InstrInfo.h
Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
2015-06-23 09:49:53 +00:00
R600Instructions.td
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R600Intrinsics.td
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R600ISelLowering.cpp
Add missing break in switch case in R600ISelLowering
2015-07-16 06:23:12 +00:00
R600ISelLowering.h
Make TargetLowering::getPointerTy() taking DataLayout as an argument
2015-07-09 02:09:04 +00:00
R600MachineFunctionInfo.cpp
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R600MachineFunctionInfo.h
Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
2015-06-23 09:49:53 +00:00
R600MachineScheduler.cpp
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R600MachineScheduler.h
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R600OptimizeVectorRegisters.cpp
Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
2015-06-23 09:49:53 +00:00
R600Packetizer.cpp
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R600RegisterInfo.cpp
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R600RegisterInfo.h
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R600RegisterInfo.td
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R600Schedule.td
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R600TextureIntrinsicsReplacer.cpp
Revert r240137 (Fixed/added namespace ending comments using clang-tidy. NFC)
2015-06-23 09:49:53 +00:00
R700Instructions.td
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SIAnnotateControlFlow.cpp
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SIDefines.h
AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support
2015-06-26 21:58:31 +00:00
SIFixControlFlowLiveIntervals.cpp
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SIFixSGPRCopies.cpp
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SIFixSGPRLiveRanges.cpp
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SIFoldOperands.cpp
AMDGPU/SI: Select mad patterns to v_mac_f32
2015-07-13 15:47:57 +00:00
SIInsertWaits.cpp
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SIInstrFormats.td
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SIInstrInfo.cpp
AMDGPU/SI: Fix read2 merging into a super register.
2015-07-14 17:57:36 +00:00
SIInstrInfo.h
AMDGPU/SI: Select mad patterns to v_mac_f32
2015-07-13 15:47:57 +00:00
SIInstrInfo.td
AMDGPU/SI: Select mad patterns to v_mac_f32
2015-07-13 15:47:57 +00:00
SIInstructions.td
AMDGPU: Set isMoveImm on s_movk_i32
2015-07-21 00:40:08 +00:00
SIIntrinsics.td
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SIISelLowering.cpp
AMDGPU/SI: Add VI patterns to select FLAT instructions for global memory ops
2015-07-20 14:28:41 +00:00
SIISelLowering.h
AMDGPU/SI: Add VI patterns to select FLAT instructions for global memory ops
2015-07-20 14:28:41 +00:00
SILoadStoreOptimizer.cpp
AMDGPU/SI: Fix read2 merging into a super register.
2015-07-14 17:57:36 +00:00
SILowerControlFlow.cpp
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SILowerI1Copies.cpp
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SIMachineFunctionInfo.cpp
MachineRegisterInfo: Remove UsedPhysReg infrastructure
2015-07-14 17:52:07 +00:00
SIMachineFunctionInfo.h
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SIPrepareScratchRegs.cpp
MachineRegisterInfo: Remove UsedPhysReg infrastructure
2015-07-14 17:52:07 +00:00
SIRegisterInfo.cpp
MachineRegisterInfo: Remove UsedPhysReg infrastructure
2015-07-14 17:52:07 +00:00
SIRegisterInfo.h
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SIRegisterInfo.td
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SISchedule.td
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SIShrinkInstructions.cpp
AMDGPU/SI: Add support for shrinking v_cndmask_b32_e32 instructions
2015-07-14 14:15:03 +00:00
SITypeRewriter.cpp
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VIInstrFormats.td
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VIInstructions.td
AMDGPU/SI: Add VI patterns to select FLAT instructions for global memory ops
2015-07-20 14:28:41 +00:00