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60108e96bb
-enable-no-nans-fp-math and -enable-no-infs-fp-math. All of the current codegen fp math optimizations only care whether the fp arithmetics arguments and results can never be NaN. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108465 91177308-0d34-0410-b5e6-96231b3b80d8
83 lines
1.6 KiB
LLVM
83 lines
1.6 KiB
LLVM
; RUN: llc < %s -march=arm -mcpu=cortex-a8 -mattr=+vfp2 -enable-unsafe-fp-math -enable-no-nans-fp-math | FileCheck -check-prefix=FINITE %s
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; RUN: llc < %s -march=arm -mcpu=cortex-a8 -mattr=+vfp2 -enable-unsafe-fp-math | FileCheck -check-prefix=NAN %s
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; rdar://7461510
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define arm_apcscc i32 @t1(float* %a, float* %b) nounwind {
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entry:
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; FINITE: t1:
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; FINITE-NOT: vldr
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; FINITE: ldr
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; FINITE: ldr
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; FINITE: cmp r0, r1
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; FINITE-NOT: vcmpe.f32
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; FINITE-NOT: vmrs
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; FINITE: beq
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; NAN: t1:
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; NAN: vldr.32 s0,
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; NAN: vldr.32 s1,
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; NAN: vcmpe.f32 s1, s0
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; NAN: vmrs apsr_nzcv, fpscr
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; NAN: beq
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%0 = load float* %a
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%1 = load float* %b
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%2 = fcmp une float %0, %1
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br i1 %2, label %bb1, label %bb2
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bb1:
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%3 = call i32 @bar()
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ret i32 %3
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bb2:
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%4 = call i32 @foo()
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ret i32 %4
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}
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define arm_apcscc i32 @t2(double* %a, double* %b) nounwind {
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entry:
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; FINITE: t2:
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; FINITE-NOT: vldr
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; FINITE: ldrd r0, [r0]
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; FINITE: cmp r0, #0
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; FINITE: cmpeq r1, #0
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; FINITE-NOT: vcmpe.f32
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; FINITE-NOT: vmrs
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; FINITE: bne
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%0 = load double* %a
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%1 = fcmp oeq double %0, 0.000000e+00
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br i1 %1, label %bb1, label %bb2
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bb1:
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%2 = call i32 @bar()
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ret i32 %2
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bb2:
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%3 = call i32 @foo()
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ret i32 %3
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}
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define arm_apcscc i32 @t3(float* %a, float* %b) nounwind {
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entry:
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; FINITE: t3:
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; FINITE-NOT: vldr
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; FINITE: ldr r0, [r0]
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; FINITE: cmp r0, #0
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; FINITE-NOT: vcmpe.f32
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; FINITE-NOT: vmrs
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; FINITE: bne
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%0 = load float* %a
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%1 = fcmp oeq float %0, 0.000000e+00
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br i1 %1, label %bb1, label %bb2
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bb1:
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%2 = call i32 @bar()
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ret i32 %2
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bb2:
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%3 = call i32 @foo()
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ret i32 %3
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}
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declare i32 @bar()
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declare i32 @foo()
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