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ae3a0be92e
integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
91 lines
3.2 KiB
LLVM
91 lines
3.2 KiB
LLVM
; RUN: llvm-as -o - %s | llc -march=cellspu -enable-unsafe-fp-math > %t1.s
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; RUN: grep fa %t1.s | count 2
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; RUN: grep fs %t1.s | count 2
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; RUN: grep fm %t1.s | count 6
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; RUN: grep fma %t1.s | count 2
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; RUN: grep fms %t1.s | count 2
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; RUN: grep fnms %t1.s | count 3
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;
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; This file includes standard floating point arithmetic instructions
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; NOTE fdiv is tested separately since it is a compound operation
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target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
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target triple = "spu"
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define float @fp_add(float %arg1, float %arg2) {
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%A = fadd float %arg1, %arg2 ; <float> [#uses=1]
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ret float %A
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}
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define <4 x float> @fp_add_vec(<4 x float> %arg1, <4 x float> %arg2) {
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%A = fadd <4 x float> %arg1, %arg2 ; <<4 x float>> [#uses=1]
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ret <4 x float> %A
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}
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define float @fp_sub(float %arg1, float %arg2) {
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%A = fsub float %arg1, %arg2 ; <float> [#uses=1]
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ret float %A
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}
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define <4 x float> @fp_sub_vec(<4 x float> %arg1, <4 x float> %arg2) {
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%A = fsub <4 x float> %arg1, %arg2 ; <<4 x float>> [#uses=1]
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ret <4 x float> %A
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}
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define float @fp_mul(float %arg1, float %arg2) {
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%A = fmul float %arg1, %arg2 ; <float> [#uses=1]
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ret float %A
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}
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define <4 x float> @fp_mul_vec(<4 x float> %arg1, <4 x float> %arg2) {
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%A = fmul <4 x float> %arg1, %arg2 ; <<4 x float>> [#uses=1]
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ret <4 x float> %A
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}
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define float @fp_mul_add(float %arg1, float %arg2, float %arg3) {
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%A = fmul float %arg1, %arg2 ; <float> [#uses=1]
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%B = fadd float %A, %arg3 ; <float> [#uses=1]
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ret float %B
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}
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define <4 x float> @fp_mul_add_vec(<4 x float> %arg1, <4 x float> %arg2, <4 x float> %arg3) {
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%A = fmul <4 x float> %arg1, %arg2 ; <<4 x float>> [#uses=1]
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%B = fadd <4 x float> %A, %arg3 ; <<4 x float>> [#uses=1]
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ret <4 x float> %B
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}
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define float @fp_mul_sub(float %arg1, float %arg2, float %arg3) {
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%A = fmul float %arg1, %arg2 ; <float> [#uses=1]
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%B = fsub float %A, %arg3 ; <float> [#uses=1]
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ret float %B
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}
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define <4 x float> @fp_mul_sub_vec(<4 x float> %arg1, <4 x float> %arg2, <4 x float> %arg3) {
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%A = fmul <4 x float> %arg1, %arg2 ; <<4 x float>> [#uses=1]
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%B = fsub <4 x float> %A, %arg3 ; <<4 x float>> [#uses=1]
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ret <4 x float> %B
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}
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; Test the straightforward way of getting fnms
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; c - a * b
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define float @fp_neg_mul_sub_1(float %arg1, float %arg2, float %arg3) {
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%A = fmul float %arg1, %arg2
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%B = fsub float %arg3, %A
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ret float %B
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}
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; Test another way of getting fnms
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; - ( a *b -c ) = c - a * b
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define float @fp_neg_mul_sub_2(float %arg1, float %arg2, float %arg3) {
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%A = fmul float %arg1, %arg2
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%B = fsub float %A, %arg3
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%C = fsub float -0.0, %B
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ret float %C
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}
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define <4 x float> @fp_neg_mul_sub_vec(<4 x float> %arg1, <4 x float> %arg2, <4 x float> %arg3) {
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%A = fmul <4 x float> %arg1, %arg2
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%B = fsub <4 x float> %A, %arg3
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%D = fsub <4 x float> < float -0.0, float -0.0, float -0.0, float -0.0 >, %B
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ret <4 x float> %D
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}
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