Aditya Nandakumar d98de6bf35 [GISel]: Support Widening G_ICMP's destination operand. ...

Updated AArch64 to widen destination to s32.
https://reviews.llvm.org/D35737

Reviewed by Tim

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@309579 91177308-0d34-0410-b5e6-96231b3b80d8

2017-07-31 17:00:16 +00:00

..

CallLowering.cpp

[IR] Abstract away ArgNo+1 attribute indexing as much as possible

2017-05-03 18:17:31 +00:00

CMakeLists.txt

Prune trailing whitespace. (To regenerate makefiles)

2017-05-28 22:54:25 +00:00

GlobalISel.cpp

[GlobalISel] Add a localizer pass for target to use

2017-05-27 01:34:00 +00:00

InstructionSelect.cpp

ARM: Compute MaxCallFrame size early

2017-05-05 22:04:05 +00:00

InstructionSelector.cpp

[globalisel][tablegen] Finish fixing compile-time regressions by merging the matcher and emitter state machines.

2017-07-05 14:50:18 +00:00

IRTranslator.cpp

Remove the unused DBG_VALUE offset parameter from GlobalISel (NFC)

2017-07-28 22:46:20 +00:00

Legalizer.cpp

GlobalISel: remove G_SEQUENCE instruction.

2017-06-23 16:15:55 +00:00

LegalizerHelper.cpp

[GISel]: Support Widening G_ICMP's destination operand.

2017-07-31 17:00:16 +00:00

LegalizerInfo.cpp

GlobalISel: add G_IMPLICIT_DEF instruction.

2017-06-30 20:27:36 +00:00

LLVMBuild.txt

Revert "Get GlobalISel to build on Linux after r286407"

2016-11-16 22:24:59 +00:00

Localizer.cpp

GlobalISel: stop localizer putting constants before EH_LABELs

2017-07-20 22:58:26 +00:00

MachineIRBuilder.cpp

Remove the unused DBG_VALUE offset parameter from GlobalISel (NFC)

2017-07-28 22:46:20 +00:00

RegBankSelect.cpp

GlobalISel: verify that a COPY is trivial when created.

2017-06-27 21:41:40 +00:00

RegisterBank.cpp

Move size and alignment information of regclass to TargetRegisterInfo

2017-04-24 18:55:33 +00:00

RegisterBankInfo.cpp

[RegisterBankInfo] Uniquely allocate instruction mapping.

2017-05-05 22:48:22 +00:00

Utils.cpp

[globalisel][tablegen] Add support for COPY_TO_REGCLASS.

2017-06-20 12:36:34 +00:00