llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ldexp.ll
Matt Arsenault faf8ffaefd AMDGPU: Rename intrinsics to use amdgcn prefix
The intrinsic target prefix should match the target name
as it appears in the triple.

This is not yet complete, but gets most of the important ones.
llvm.AMDGPU.* intrinsics used by mesa and libclc are still handled
for compatability for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@258557 91177308-0d34-0410-b5e6-96231b3b80d8
2016-01-22 21:30:34 +00:00

45 lines
1.7 KiB
LLVM

; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
declare float @llvm.amdgcn.ldexp.f32(float, i32) nounwind readnone
declare double @llvm.amdgcn.ldexp.f64(double, i32) nounwind readnone
declare float @llvm.AMDGPU.ldexp.f32(float, i32) nounwind readnone
declare double @llvm.AMDGPU.ldexp.f64(double, i32) nounwind readnone
; SI-LABEL: {{^}}test_ldexp_f32:
; SI: v_ldexp_f32
; SI: s_endpgm
define void @test_ldexp_f32(float addrspace(1)* %out, float %a, i32 %b) nounwind {
%result = call float @llvm.amdgcn.ldexp.f32(float %a, i32 %b) nounwind readnone
store float %result, float addrspace(1)* %out, align 4
ret void
}
; SI-LABEL: {{^}}test_ldexp_f64:
; SI: v_ldexp_f64
; SI: s_endpgm
define void @test_ldexp_f64(double addrspace(1)* %out, double %a, i32 %b) nounwind {
%result = call double @llvm.amdgcn.ldexp.f64(double %a, i32 %b) nounwind readnone
store double %result, double addrspace(1)* %out, align 8
ret void
}
; SI-LABEL: {{^}}test_legacy_ldexp_f32:
; SI: v_ldexp_f32
; SI: s_endpgm
define void @test_legacy_ldexp_f32(float addrspace(1)* %out, float %a, i32 %b) nounwind {
%result = call float @llvm.AMDGPU.ldexp.f32(float %a, i32 %b) nounwind readnone
store float %result, float addrspace(1)* %out, align 4
ret void
}
; SI-LABEL: {{^}}test_legacy_ldexp_f64:
; SI: v_ldexp_f64
; SI: s_endpgm
define void @test_legacy_ldexp_f64(double addrspace(1)* %out, double %a, i32 %b) nounwind {
%result = call double @llvm.AMDGPU.ldexp.f64(double %a, i32 %b) nounwind readnone
store double %result, double addrspace(1)* %out, align 8
ret void
}