llvm/test/CodeGen/X86/shift-and.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

79 lines
1.5 KiB
LLVM

; RUN: llc < %s -mtriple=i386-apple-macosx | FileCheck %s --check-prefix=X32
; RUN: llc < %s -mtriple=x86_64-apple-macosx | FileCheck %s --check-prefix=X64
define i32 @t1(i32 %t, i32 %val) nounwind {
; X32-LABEL: t1:
; X32-NOT: andl
; X32: shll
; X64-LABEL: t1:
; X64-NOT: andl
; X64: shll
%shamt = and i32 %t, 31
%res = shl i32 %val, %shamt
ret i32 %res
}
define i32 @t2(i32 %t, i32 %val) nounwind {
; X32-LABEL: t2:
; X32-NOT: andl
; X32: shll
; X64-LABEL: t2:
; X64-NOT: andl
; X64: shll
%shamt = and i32 %t, 63
%res = shl i32 %val, %shamt
ret i32 %res
}
@X = internal global i16 0
define void @t3(i16 %t) nounwind {
; X32-LABEL: t3:
; X32-NOT: andl
; X32: sarw
; X64-LABEL: t3:
; X64-NOT: andl
; X64: sarw
%shamt = and i16 %t, 31
%tmp = load i16, i16* @X
%tmp1 = ashr i16 %tmp, %shamt
store i16 %tmp1, i16* @X
ret void
}
define i64 @t4(i64 %t, i64 %val) nounwind {
; X64-LABEL: t4:
; X64-NOT: and
; X64: shrq
%shamt = and i64 %t, 63
%res = lshr i64 %val, %shamt
ret i64 %res
}
define i64 @t5(i64 %t, i64 %val) nounwind {
; X64-LABEL: t5:
; X64-NOT: and
; X64: shrq
%shamt = and i64 %t, 191
%res = lshr i64 %val, %shamt
ret i64 %res
}
; rdar://11866926
define i64 @t6(i64 %key, i64* nocapture %val) nounwind {
entry:
; X64-LABEL: t6:
; X64-NOT: movabsq
; X64: decq
; X64: andq
%shr = lshr i64 %key, 3
%0 = load i64, i64* %val, align 8
%sub = add i64 %0, 2305843009213693951
%and = and i64 %sub, %shr
ret i64 %and
}