Chandler Carruth 70968365db [codegen,aarch64] Add a target hook to the code generator to control ... vector type legalization strategies in a more fine grained manner, and change the legalization of several v1iN types and v1f32 to be widening rather than scalarization on AArch64. This fixes an assertion failure caused by scalarizing nodes like "v1i32 trunc v1i64". As v1i64 is legal it will fail to scalarize v1i32. This also provides a foundation for other targets to have more granular control over how vector types are legalized. Patch by Hao Liu, reviewed by Tim Northover. I'm committing it to allow some work to start taking place on top of this patch as it adds some really important hooks to the backend that I'd like to immediately start using. =] http://reviews.llvm.org/D4322 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212242 91177308-0d34-0410-b5e6-96231b3b80d8		2014-07-03 00:23:43 +00:00
..
AsmParser	aarch64: support target-specific .req assembler directive	2014-07-02 04:50:23 +00:00
Disassembler
InstPrinter
MCTargetDesc	Move expression visitation logic up to MCStreamer.	2014-06-25 15:45:33 +00:00
TargetInfo
Utils
AArch64.h
AArch64.td
AArch64AddressTypePromotion.cpp	AArch64: Re-enable AArch64AddressTypePromotion	2014-07-02 18:17:40 +00:00
AArch64AdvSIMDScalarPass.cpp
AArch64AsmPrinter.cpp
AArch64BranchRelaxation.cpp
AArch64CallingConvention.td
AArch64CleanupLocalDynamicTLSPass.cpp
AArch64CollectLOH.cpp
AArch64ConditionalCompares.cpp
AArch64DeadRegisterDefinitionsPass.cpp
AArch64ExpandPseudoInsts.cpp
AArch64FastISel.cpp
AArch64FrameLowering.cpp
AArch64FrameLowering.h
AArch64InstrAtomics.td
AArch64InstrFormats.td
AArch64InstrInfo.cpp
AArch64InstrInfo.h
AArch64InstrInfo.td
AArch64ISelDAGToDAG.cpp	[AArch64] Unsized types don't specify an alignment.	2014-06-30 15:03:00 +00:00
AArch64ISelLowering.cpp	[codegen,aarch64] Add a target hook to the code generator to control	2014-07-03 00:23:43 +00:00
AArch64ISelLowering.h	[codegen,aarch64] Add a target hook to the code generator to control	2014-07-03 00:23:43 +00:00
AArch64LoadStoreOptimizer.cpp
AArch64MachineFunctionInfo.h
AArch64MCInstLower.cpp
AArch64MCInstLower.h
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp
AArch64RegisterInfo.cpp
AArch64RegisterInfo.h
AArch64RegisterInfo.td
AArch64SchedA53.td
AArch64SchedA57.td
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp	[DAG] Pass the argument list to the CallLoweringInfo via move semantics. NFCI.	2014-07-01 22:01:54 +00:00
AArch64SelectionDAGInfo.h
AArch64StorePairSuppress.cpp
AArch64Subtarget.cpp
AArch64Subtarget.h
AArch64TargetMachine.cpp	AArch64: Re-enable AArch64AddressTypePromotion	2014-07-02 18:17:40 +00:00
AArch64TargetMachine.h	Remove extraneous includes from the target machines.	2014-06-26 19:30:05 +00:00
AArch64TargetObjectFile.cpp
AArch64TargetObjectFile.h
AArch64TargetTransformInfo.cpp
CMakeLists.txt
LLVMBuild.txt
Makefile