mirror of
https://github.com/RPCS3/llvm.git
synced 2024-12-25 05:25:53 +00:00
ae3a0be92e
integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
48 lines
2.6 KiB
LLVM
48 lines
2.6 KiB
LLVM
; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \
|
|
; RUN: grep {fadd float}
|
|
; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \
|
|
; RUN: grep {fmul float}
|
|
; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \
|
|
; RUN: not grep {insertelement.*0.00}
|
|
; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \
|
|
; RUN: not grep {call.*llvm.x86.sse.mul}
|
|
; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \
|
|
; RUN: not grep {call.*llvm.x86.sse.sub}
|
|
; END.
|
|
|
|
define i16 @test1(float %f) {
|
|
entry:
|
|
%tmp = insertelement <4 x float> undef, float %f, i32 0 ; <<4 x float>> [#uses=1]
|
|
%tmp10 = insertelement <4 x float> %tmp, float 0.000000e+00, i32 1 ; <<4 x float>> [#uses=1]
|
|
%tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1]
|
|
%tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3 ; <<4 x float>> [#uses=1]
|
|
%tmp28 = tail call <4 x float> @llvm.x86.sse.sub.ss( <4 x float> %tmp12, <4 x float> < float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
|
|
%tmp37 = tail call <4 x float> @llvm.x86.sse.mul.ss( <4 x float> %tmp28, <4 x float> < float 5.000000e-01, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
|
|
%tmp48 = tail call <4 x float> @llvm.x86.sse.min.ss( <4 x float> %tmp37, <4 x float> < float 6.553500e+04, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
|
|
%tmp59 = tail call <4 x float> @llvm.x86.sse.max.ss( <4 x float> %tmp48, <4 x float> zeroinitializer ) ; <<4 x float>> [#uses=1]
|
|
%tmp.upgrd.1 = tail call i32 @llvm.x86.sse.cvttss2si( <4 x float> %tmp59 ) ; <i32> [#uses=1]
|
|
%tmp69 = trunc i32 %tmp.upgrd.1 to i16 ; <i16> [#uses=1]
|
|
ret i16 %tmp69
|
|
}
|
|
|
|
define i32 @test2(float %f) {
|
|
%tmp5 = fmul float %f, %f
|
|
%tmp9 = insertelement <4 x float> undef, float %tmp5, i32 0
|
|
%tmp10 = insertelement <4 x float> %tmp9, float 0.000000e+00, i32 1
|
|
%tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2
|
|
%tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3
|
|
%tmp19 = bitcast <4 x float> %tmp12 to <4 x i32>
|
|
%tmp21 = extractelement <4 x i32> %tmp19, i32 0
|
|
ret i32 %tmp21
|
|
}
|
|
|
|
declare <4 x float> @llvm.x86.sse.sub.ss(<4 x float>, <4 x float>)
|
|
|
|
declare <4 x float> @llvm.x86.sse.mul.ss(<4 x float>, <4 x float>)
|
|
|
|
declare <4 x float> @llvm.x86.sse.min.ss(<4 x float>, <4 x float>)
|
|
|
|
declare <4 x float> @llvm.x86.sse.max.ss(<4 x float>, <4 x float>)
|
|
|
|
declare i32 @llvm.x86.sse.cvttss2si(<4 x float>)
|