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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31313 91177308-0d34-0410-b5e6-96231b3b80d8
58 lines
2.2 KiB
C++
58 lines
2.2 KiB
C++
//===- AlphaInstrInfo.h - Alpha Instruction Information ---------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the Alpha implementation of the TargetInstrInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef ALPHAINSTRUCTIONINFO_H
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#define ALPHAINSTRUCTIONINFO_H
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#include "llvm/Target/TargetInstrInfo.h"
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#include "AlphaRegisterInfo.h"
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namespace llvm {
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class AlphaInstrInfo : public TargetInstrInfo {
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const AlphaRegisterInfo RI;
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public:
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AlphaInstrInfo();
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/// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
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/// such, whenever a client has an instance of instruction info, it should
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/// always be able to get register info as well (through this method).
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///
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virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
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/// Return true if the instruction is a register to register move and
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/// leave the source and dest operands in the passed parameters.
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///
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virtual bool isMoveInstr(const MachineInstr &MI,
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unsigned &SrcReg, unsigned &DstReg) const;
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virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
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virtual unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
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virtual void InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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MachineBasicBlock *FBB,
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const std::vector<MachineOperand> &Cond) const;
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bool AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB,
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MachineBasicBlock *&FBB,
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std::vector<MachineOperand> &Cond) const;
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void RemoveBranch(MachineBasicBlock &MBB) const;
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void insertNoop(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MI) const;
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bool BlockHasNoFallThrough(MachineBasicBlock &MBB) const;
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bool ReverseBranchCondition(std::vector<MachineOperand> &Cond) const;
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};
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}
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#endif
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