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cd77686254
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116379 91177308-0d34-0410-b5e6-96231b3b80d8
107 lines
2.6 KiB
LLVM
107 lines
2.6 KiB
LLVM
;RUN: llc -mtriple=armv7-apple-darwin -mcpu=cortex-a8 -mattr=-neonfp -show-mc-encoding < %s | FileCheck %s
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; FIXME: Once the ARM integrated assembler is up and going, these sorts of tests
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; should run on .s source files rather than using llc to generate the
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; assembly.
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define double @f1(double %a, double %b) nounwind readnone {
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entry:
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; CHECK: f1
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; CHECK: vadd.f64 d16, d17, d16 @ encoding: [0xa0,0x0b,0x71,0xee]
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%add = fadd double %a, %b
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ret double %add
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}
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define float @f2(float %a, float %b) nounwind readnone {
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entry:
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; CHECK: f2
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; CHECK: vadd.f32 s0, s1, s0 @ encoding: [0x80,0x0a,0x30,0xee]
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%add = fadd float %a, %b
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ret float %add
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}
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define double @f3(double %a, double %b) nounwind readnone {
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entry:
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; CHECK: f3
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; CHECK: vsub.f64 d16, d17, d16 @ encoding: [0xe0,0x0b,0x71,0xee]
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%sub = fsub double %a, %b
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ret double %sub
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}
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define float @f4(float %a, float %b) nounwind readnone {
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entry:
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; CHECK: f4
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; CHECK: vsub.f32 s0, s1, s0 @ encoding: [0xc0,0x0a,0x30,0xee]
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%sub = fsub float %a, %b
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ret float %sub
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}
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define double @f5(double %a, double %b) nounwind readnone {
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entry:
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; CHECK: f5
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; CHECK: vdiv.f64 d16, d17, d16 @ encoding: [0xa0,0x0b,0xc1,0xee]
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%div = fdiv double %a, %b
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ret double %div
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}
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define float @f6(float %a, float %b) nounwind readnone {
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entry:
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; CHECK: f6
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; CHECK: vdiv.f32 s0, s1, s0 @ encoding: [0x80,0x0a,0x80,0xee]
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%div = fdiv float %a, %b
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ret float %div
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}
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define double @f7(double %a, double %b) nounwind readnone {
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entry:
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; CHECK: f7
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; CHECK: vmul.f64 d16, d17, d16 @ encoding: [0xa0,0x0b,0x61,0xee]
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%mul = fmul double %a, %b
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ret double %mul
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}
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define float @f8(float %a, float %b) nounwind readnone {
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entry:
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; CHECK: f8
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; CHECK: vmul.f32 s0, s1, s0 @ encoding: [0x80,0x0a,0x20,0xee]
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%mul = fmul float %a, %b
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ret float %mul
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}
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define double @f9(double %a, double %b) nounwind readnone {
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entry:
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; CHECK: f9
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; CHECK: vnmul.f64 d16, d17, d16 @ encoding: [0xe0,0x0b,0x61,0xee]
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%mul = fmul double %a, %b
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%sub = fsub double -0.000000e+00, %mul
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ret double %sub
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}
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define void @f10(float %a, float %b, float* %c) nounwind readnone {
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entry:
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; CHECK: f10
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; CHECK: vnmul.f32 s0, s1, s0 @ encoding: [0xc0,0x0a,0x20,0xee]
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%mul = fmul float %a, %b
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%sub = fsub float -0.000000e+00, %mul
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store float %sub, float* %c, align 4
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ret void
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}
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define i1 @f11(double %a, double %b) nounwind readnone {
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entry:
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; CHECK: f11
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; CHECK: vcmpe.f64 d17, d16 @ encoding: [0xe0,0x1b,0xf4,0xee]
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%cmp = fcmp oeq double %a, %b
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ret i1 %cmp
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}
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define i1 @f12(float %a, float %b) nounwind readnone {
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entry:
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; CHECK: f12
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; CHECK: vcmpe.f32 s1, s0 @ encoding: [0xc0,0x0a,0xf4,0xee]
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%cmp = fcmp oeq float %a, %b
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ret i1 %cmp
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}
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