Farhana Aleen cf8aa848ec [AMDGPU] Support idot2 pattern. ...

Summary: Transform add (mul ((i32)S0.x, (i32)S1.x),

         add( mul ((i32)S0.y, (i32)S1.y), (i32)S3) => i/udot2((v2i16)S0, (v2i16)S1, (i32)S3)

Author: FarhanaAleen

Reviewed By: arsenm

Subscribers: llvm-commits, AMDGPU

Differential Revision: https://reviews.llvm.org/D50024

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@340295 91177308-0d34-0410-b5e6-96231b3b80d8

2018-08-21 16:21:15 +00:00

..

AArch64

Revert "Revert r339977: [GISel]: Add Opcodes for a few LLVM Intrinsics"

2018-08-20 18:43:19 +00:00

AMDGPU

[AMDGPU] Support idot2 pattern.

2018-08-21 16:21:15 +00:00

ARC

[ARC] Add ARC backend.

2017-08-24 15:40:33 +00:00

ARM

[DAGCombiner] Reduce load widths of shifted masks

2018-08-21 10:26:59 +00:00

AVR

[AVR] Set trackLivenessAfterRegAlloc

2018-06-11 14:46:48 +00:00

BPF

bpf: add missing RegState to notify MachineInstr verifier necessary register usage

2018-07-27 16:58:52 +00:00

Generic

[DWARF] Unclamp line table version on Darwin for v5 and later.

2018-08-08 21:16:50 +00:00

Hexagon

Change how finalizeBundle selects debug location for the BUNDLE instruction

2018-08-21 10:59:50 +00:00

Inputs

…

Lanai

Remove SETCCE use from Lanai's backend

2018-06-03 12:56:24 +00:00

Mips

[MIPS GlobalISel] Select bitwise instructions

2018-08-21 08:15:56 +00:00

MIR

Consistently use MemoryLocation::UnknownSize to indicate unknown access size

2018-08-20 20:37:57 +00:00

MSP430

Emit a left-shift instead of a power-of-two multiply for jump-tables

2018-05-16 08:58:26 +00:00

Nios2

[Nios2] Arithmetic instructions for R1 and R2 ISA.

2018-01-09 11:15:08 +00:00

NVPTX

DAG: Check no-signed-zeros instead of unsafe-fp-math

2018-08-12 19:09:12 +00:00

PowerPC

[PowerPC] Add a peephole post RA to transform the inst that fed by add

2018-08-20 02:52:55 +00:00

RISCV

[SelectionDAG] Improve the legalisation lowering of UMULO.

2018-08-16 18:39:39 +00:00

SPARC

[Sparc] Get sret arg size from CallLoweringInfo.getArgs()

2018-08-17 10:40:00 +00:00

SystemZ

[SystemZ] Require asserts in subregliveness-06.mir

2018-08-16 20:12:15 +00:00

Thumb

[SelectionDAG] Improve the legalisation lowering of UMULO.

2018-08-16 18:39:39 +00:00

Thumb2

[SelectionDAG] Improve the legalisation lowering of UMULO.

2018-08-16 18:39:39 +00:00

WebAssembly

[WebAssembly] Revert type of wake count in atomic.wake to i32

2018-08-20 23:49:29 +00:00

WinCFGuard

Rename the cfguard module flag to cfguardtable

2018-08-10 09:48:53 +00:00

WinEH

[DebugInfo] Add DILabel metadata and intrinsic llvm.dbg.label.

2018-05-09 02:40:45 +00:00

X86

[X86] Add SSE2 and XOP udiv combine tests

2018-08-21 15:21:45 +00:00

XCore

[DAGCombiner] extend(ifpositive(X)) -> shift-right (not X)

2018-07-15 16:27:07 +00:00